FOR AUTOMOTIVE 105

°C OPERATION 2-WIRE SERIAL E

S-24CS01A/02A/04A H Series

25

If SCL and SDA of the S-24CS01A/02A/04A are changed at the same time, it is necessary to prevent the start/stop

condition from being mistakenly recognized due to the effect of noise. If a start/stop condition is mistakenly recognized

during communication, the S-24CS01A/02A/04A enters the standby status.

It is recommended that SDA is delayed from the falling edge of SCL by 0.3

μs minimum in the S-24CS01A/02A/04A.

This is to prevent time lag caused by the load of the bus line from generating the stop (or start) condition.

SCL

SDA

μs Min.

Figure 29 S-24CS01A/02A/04A Data Hold Time

7. SDA pin and SCL pin noise suppression time

The S-24CS01A/02A/04A includes a built-in low-pass filter to suppress noise at the SDA and SCL pins. This means

that if the power supply voltage is 5.0 V, noise with a pulse width of 160 ns or less can be suppressed.

[ns]

200

100

300

2

3

4

5

[V]

Figure 30 Noise Suppression Time for SDA and SCL Pins