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STM32L4A6XG Datasheet(PDF) 29 Page - STMicroelectronics

Part # STM32L4A6XG
Description  Ultra-low-power Arm® Cortex®-M4 32-bit MCUFPU, 100DMIPS, 1MB Flash, 320KB SRAM, USB OTG FS, audio, AESHASH, ext. SMPS
PDF  282 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32L4A6XG Datasheet(HTML) 29 Page - STMicroelectronics

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Standby
LPR
Power
ed Off
Off
SRAM
2 ON
LSE
LSI
BOR, RTC, IWDG
***
All other peripherals are
powered off.
***
I/O configuration can be
floating, pull-up or pull-down
Reset pin
5 I/Os (WKUPx)(13)
BOR, RTC, IWDG
0.48 µA w/o RTC
0.78 µA w/ RTC
15.3 µs
OFF
Power
ed
Off
0.11 µA w/o RTC
0.42 µA w/ RTC
Shutdown
OFF
Power
ed Off
Off
Power
ed
Off
LSE
RTC
***
All other peripherals are
powered off.
***
I/O configuration can be
floating, pull-up or pull-
down(14)
Reset pin
5 I/Os (WKUPx)(14)
RTC
0.03 µA w/o RTC
0.23 µA w/ RTC
306 µs
1. LPR means Main regulator is OFF and Low-power regulator is ON.
2. All peripherals can be active or clock gated to save power consumption.
3. Typical current at VDD = 1.8 V, 25°C. Consumptions values provided running from SRAM, Flash memory Off, 80 MHz in Range 1, 26 MHz in Range 2, 2 MHz in
LPRun/LPSleep.
4. The Flash memory can be put in power-down and its clock can be gated off when executing from SRAM.
5. Theoretical value based on VDD = 3.3 V, DC/DC Efficiency of 85%, VCORE = 1.10 V
6. Theoretical value based on VDD = 3.3 V, DC/DC Efficiency of 85%, VCORE = 1.05 V
7. The SRAM1 and SRAM2 clocks can be gated on or off independently.
8. SMPS mode can be used in STOP0 Mode, but no significant power gain can be expected.
9. U(S)ART and LPUART reception is functional in Stop mode, and generates a wakeup interrupt on Start, address match or received frame event.
10. I2C address detection is functional in Stop mode, and generates a wakeup interrupt in case of address match.
11. OTG_FS wakeup by resume from suspend and attach detection protocol event.
12. SWPMI1 wakeup by resume from suspend.
13. The I/Os with wakeup from Standby/Shutdown capability are: PA0, PC13, PE6, PA2, PC5.
14. I/Os can be configured with internal pull-up, pull-down or floating in Shutdown mode but the configuration is lost when exiting the Shutdown mode.
Table 4. STM32L4A6xG modes overview (continued)
Mode
Regulator(1)
CPU Flash SRAM Clocks
DMA & Peripherals(2)
Wakeup source
Consumption(3)
Wakeup time



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