68HC05JB3 datasheet(93/134 Pages) FREESCALE

93 / 134 page

November 5, 1998

GENERAL RELEASE SPECIFICATION

MC68HC05JB3

UNIVERSAL SERIAL BUS MODULE

MOTOROLA

REV 1

10-25

ENABLE2 — Endpoint 2 Enable

This read/write bit enables Endpoint 2 and allows the USB to respond to IN

packets addressed to Endpoint 2. Reset clears this bit.

1 =

Endpoint 2 is enabled and can respond to an IN token.

0 =

Endpoint 2 is disabled.

ENABLE1 — Endpoint 1 Enable

This read/write bit enables Endpoint 1 and allows the USB to respond to IN

packets addressed to Endpoint 1. Reset clears this bit.

1 =

Endpoint 1 is enabled and can respond to an IN token.

0 =

Endpoint 1 is disabled.

STALL2 — Endpoint 2 Force Stall Bit

This read/write bit causes Endpoint 2 to return a STALL handshake when

polled by either an IN or OUT token by the USB Host Controller. Reset clears

this bit.

1 =

Send STALL handshake.

0 =

Default.

STALL1 — Endpoint 1 Force Stall Bit

This read/write bit causes Endpoint 1 to return a STALL handshake when

polled by either an IN or OUT token by the USB Host Controller. Reset clears

this bit.

1 =

Send STALL handshake.

0 =

Default.

10.5.7 USB Status Register (USR)

RSEQ — Endpoint 0 Receive Sequence Bit

This read only bit indicates the type of data packet last received for Endpoint 0

(DATA0 or DATA1).

1 =

DATA1 Token received in last Endpoint 0 receive.

0 =

DATA0 Token received in last Endpoint 0 receive.

SETUP — SETUP Token Detect Bit

This read only bit indicates that a valid SETUP token has been received.

1 =

Last token received for Endpoint 0 was a SETUP token.

0 =

Last token received for Endpoint 0 was not a SETUP token.

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

USR

RSEQ

SETUP

RPSIZ3

RPSIZ2

RPSIZ1

RPSIZ0

$003D

reset:

UUUUUUUU

= Unimplemented

Figure 10-26. USB Status Register (USR)

Freescale Semiconductor, Inc.

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