VSC7440 datasheet(206/444 Pages) MICROSEMI

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Functional Descriptions

VMDS-10492 VSC7440 Datasheet Revision 4.2

189

The device performs a final port of exit (POE) calculation in ingress device when destination is a global

aggregated port. GLAG POE calculation must be enabled

(ANA_AC::COMMON_VSTAX_CFG.VSTAX2_GLAG_ENA). When enabled, GLAG forwarding uses a

portion of the PGID table (addresses 75 to 138). These addresses must use UPSID, UPSPN encoding

by setting the stack interpret bit.

POE calculation, which selects one of the global aggregated as destination port, is shown in the following

illustration.

Figure 42 •

GLAG Port of Exit Calculation

The total number of ports part of a GLAG must be specified in ANA_AC:GLAG:MBR_CNT_CFG.

The corresponding destination must be configured in PGID table for each GLAG member.

3.23.1.5 Port Mask Operation

The final destination port mask is deducted as shown in the following illustration.

ANA_AC:GLAG:MBR_CNT_CFG

Configures number of members per GLAG.

Table 120 •

GLAG Forward Registers Overview (continued)

Target::Register.Field

Description

Replication

MAC Table

dmac

{glagid, glag_mbr_idx}

{upsid, upspn}

glagid

glag_mbr_cnt_table

glag_mbr_idx := ac mod glag_mbr_cnt

glag part of PGID table

glag_mbr_cnt

VSC7440 Datasheet(PDF) 206 Page - Microsemi Corporation