RM48L540DPGET datasheet(43/174 Pages) TI

43 / 174 page

RM48L940, RM48L740, RM48L540

www.ti.com

SPNS175C – APRIL 2012 – REVISED JUNE 2015

5.7

Power Consumption

Over Recommended Operating Conditions

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

fHCLK = 200 MHz

VCC Digital supply current (operating

240(1)

400(2)

fVCLK = 100 MHz,

mode)

Flash in pipelined mode, VCCmax

ICC, ICCPLL

VCC Digital supply current (LBIST mode)

LBIST clock rate = 100 MHz

655(3)(4)

PBIST ROM clock frequency =

VCC Digital supply current (PBIST mode)

655(3)(4)

100 MHz

ICCIO

VCCIO supply current (operating mode)

No DC load, VCCmax

Single ADC operational, VCCADmax

ICCAD

VCCAD supply current (operating mode)

Both ADCs operational, VCCADmax

Single ADC operational, ADREFHImax

IADREFHI

ADREFHI supply current (operating mode)

Both ADCs operational, ADREFHImax

Read from 1 bank and program or

ICCP

VCCP pump supply current

erase another bank, VCCPmax

(1)

The typical value is the average current for the nominal process corner and junction temperature of 25ºC.

(2)

The maximum ICC, value can be derated

•

linearly with voltage

•

by 1 mA/MHz for lower operating frequency when fHCLK= 2 * fVCLK

•

for lower junction temperature by the equation below where TJK is the junction temperature in Kelvin and the result is in milliamperes.

166 - 0.15 e0.0174 T

(3)

The maximum ICC, value can be derated

•

linearly with voltage

•

by 1.7 mA/MHz for lower operating frequency when fHCLK= 2 * fVCLK

•

for lower junction temperature by the equation below where TJK is the junction temperature in Kelvin and the result is in milliamperes.

166 - 0.15 e0.0174 T

(4)

LBIST and PBIST currents are for a short duration, typically less than 10 ms. They are usually ignored for thermal calculations for the

device and the voltage regulator

Specifications

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