Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

PIC16F913 Datasheet(PDF) 74 Page - Microchip Technology

Part # PIC16F913
Description  28/40/44-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt Technology
PDF  272 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC16F913 Datasheet(HTML) 74 Page - Microchip Technology

Back Button PIC16F913 Datasheet HTML 70Page - Microchip Technology PIC16F913 Datasheet HTML 71Page - Microchip Technology PIC16F913 Datasheet HTML 72Page - Microchip Technology PIC16F913 Datasheet HTML 73Page - Microchip Technology PIC16F913 Datasheet HTML 74Page - Microchip Technology PIC16F913 Datasheet HTML 75Page - Microchip Technology PIC16F913 Datasheet HTML 76Page - Microchip Technology PIC16F913 Datasheet HTML 77Page - Microchip Technology PIC16F913 Datasheet HTML 78Page - Microchip Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 74 / 272 page
background image
PIC16F917/916/914/913
DS41250E-page 72
Preliminary
© 2005 Microchip Technology Inc.
TABLE 4-1:
OSCILLATOR DELAY EXAMPLES
System Clock
Source
Frequency
Switching From
Oscillator Delay
(TOST)
Comments
LFIOSC
31 kHz
Sleep
10
μs internal delay Following a wake-up from Sleep mode
or POR, an internal delay is invoked to
allow the memory bias to stabilize
before program execution can begin.
HFIOSC
125 kHz-8 MHz
Sleep
10
μs internal delay Following a wake-up from Sleep mode
or POR, an internal delay is invoked to
allow the memory bias to stabilize
before program execution can begin.
XT or HS
4-20 MHz
INTOSC or Sleep
1024 clock cycles
Following a change from INTOSC, an
OST of 1024 cycles must occur.
LP
32 kHz
INTOSC or Sleep
1024 clock cycles
Following a change from INTOSC, an
OST of 1024 cycles must occur. See
Section 4.3.1.1 “Special Case” for
special case conditions.
LP with T1OSC
enabled
32 kHz
Sleep
10
μs internal delay Following a wake-up from Sleep mode,
an internal delay is invoked to allow the
memory bias to stabilize before
program execution can begin. See
Section 4.3.1.1 “Special Case” for
details about this special case.
EC, RC
0-20 MHz
Sleep
10
μs internal delay Following a wake-up from Sleep mode
or POR, an internal delay is invoked to
allow the memory bias to stabilize
before program execution can begin.
EC, RC
0-20 MHz
LFIOSC
10
μs internal delay Following a switch from a LFIOSC or
POR, an internal delay is invoked to
allow the memory bias to stabilize
before program execution can begin.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com