PIC16F913 datasheet(84/272 Pages) MICROCHIP

84 / 272 page

PIC16F917/916/914/913

DS41250E-page 82

Preliminary

5.3

Using Timer0 with an External

Clock

When no prescaler is used, the external clock input is the

same as the prescaler output. The synchronization of

T0CKI, with the internal phase clocks, is accomplished by

sampling the prescaler output on the Q2 and Q4 cycles of

the internal phase clocks. Therefore, it is necessary for

T0CKI to be high for at least 2 TOSC (and a small RC delay

of 20 ns) and low for at least 2 TOSC (and a small RC delay

of 20 ns). Refer to the electrical specification of the

desired device.

OPTION_REG – OPTION REGISTER (ADDRESS: 81h OR 181h)

R/W-1

RBPU

INTEDG

T0CS

T0SE

PSA

PS2

PS1

PS0

bit 7

bit 0

bit 7

RBPU: PORTB Pull-up Enable bit

= PORTB pull-ups are disabled

= PORTB pull-ups are enabled by individual port latch values in WPUA register

bit 6

INTEDG: Interrupt Edge Select bit

= Interrupt on rising edge of RB0/INT/SEG0 pin

= Interrupt on falling edge of RB0/INT/SEG0 pin

bit 5

T0CS: TMR0 Clock Source Select bit

= Transition on RA4/C1OUT/T0CKI/SEG4 pin

= Internal instruction cycle clock (CLKO)

bit 4

T0SE: TMR0 Source Edge Select bit

= Increment on high-to-low transition on RA4/C1OUT/T0CKI/SEG4 pin

= Increment on low-to-high transition on RA4/C1OUT/T0CKI/SEG4 pin

bit 3

PSA: Prescaler Assignment bit

= Prescaler is assigned to the WDT

= Prescaler is assigned to the Timer0 module

bit 2-0

PS<2:0>: Prescaler Rate Select bits

Note 1: A dedicated 16-bit WDT postscaler is available for the PIC16F917/916/914/913.

See Section 16.6 “Watchdog Timer (WDT)” for more information.

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

- n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

000

001

010

011

100

101

110

111

1 : 2

1 : 4

1 : 8

1 : 16

1 : 32

1 : 64

1 : 128

1 : 256

1 : 1

1 : 2

1 : 4

1 : 8

1 : 16

1 : 32

1 : 64

1 : 128

Bit Value

TMR0 Rate WDT Rate(1)

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