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PIC16F916E/P301 Datasheet(PDF) 245 Page - Microchip Technology

Part # PIC16F916E/P301
Description  28/40/44-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt Technology
PDF  272 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC16F916E/P301 Datasheet(HTML) 245 Page - Microchip Technology

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© 2005 Microchip Technology Inc.
Preliminary
DS41250E-page 243
PIC16F917/916/914/913
TABLE 19-15: PIC16F917/916/914/913 A/D CONVERTER CHARACTERISTICS:
FIGURE 19-17:
PIC16F917/916/914/913 A/D CONVERSION TIMING (NORMAL MODE)
Standard Operating Conditions (unless otherwise stated)
Operating Temperature -40°C
≤ TA ≤ +125°C
Param
No.
Sym.
Characteristic
Min.
Typ†
Max.
Units
Conditions
A01
NR
Resolution
—
—
10 bits
bits
A03
EIL
Integral Error
—
—
<±1LSb VREF = 5.0V
A04
EDL
Differential Error
—
—
<±1
LSb
No missing codes to 10 bits
VREF = 5.0V
A06
EOFF
Offset Error
—
—
<±1LSb VREF = 5.0V
A07
EGN
Gain Error
—
—
<±1LSb VREF = 5.0V
A10
—
Monotonicity
—
assured(1)
——
VSS
≤ VAIN ≤ VREF+
A20
VREF
Reference Voltage
(VREF+ – VREF-)
2.5
—
VDD
V
Full 10-bit accuracy
A21
VREF+ Reference Voltage High
VDD – 2.5V
—
VDD + 0.3V
V
A22
VREF-
Reference Voltage Low
VSS – 0.3V
—
VREF+ -2V
V
A25
VAIN
Analog Input Voltage
VSS – 0.3V
—
VREF+ +0.3V
V
A30
ZAIN
Recommended Imped-
ance of Analog Voltage
Source
——
10
k
Ω
A50
IREF
VREF Input Current (2)
——
±5
±150
μA
μA
During VAIN acquisition.
During A/D conversion cycle.
*
These parameters are characterized but not tested.
†
Data in ‘Typ’ column is at 5.0V, 25
°C unless otherwise stated. These parameters are for design guidance only
and are not tested.
Note 1:
The A/D conversion result never decreases with an increase in the input voltage and has no missing codes.
2:
VREF+ current is from RA3/AN3/C1+/VREF+/SEG15 pin or VDD, whichever is selected as the VREF+ source.
VREF- current is from RA2/AN2/C2+/VREF-/COM2 pin or VSS, whichever is selected as the VREF- source.
131
130
132
BSF ADCON0, GO
Q4
A/D CLK
A/D Data
ADRES
ADIF
GO
Sample
OLD_DATA
Sampling Stopped
DONE
NEW_DATA
98
7
3
2
1
0
Note 1:
If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This allows the
SLEEP
instruction to be executed.
1 TCY
6
134
(TOSC/2)(1)
1 TCY



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