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AS9C25512M2018L Datasheet(PDF) 22 Page - Alliance Semiconductor Corporation

Part # AS9C25512M2018L
Description  2.5V 512/256K x 18 Synchronous Dual-port SRAM with 3.3V or 2.5V interface
PDF  30 Pages
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Manufacturer  ALSC [Alliance Semiconductor Corporation]
Direct Link  https://www.alliancememory.com
Logo ALSC - Alliance Semiconductor Corporation

AS9C25512M2018L Datasheet(HTML) 22 Page - Alliance Semiconductor Corporation

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AS9C25512M2018L
AS9C25256M2018L
9/24/04, v.1.2
Alliance Semiconductor
P. 22 of 30
®
AC test conditions
Input Pulse Level (Address and Controls)
GND to 3.0V/GND to 2.4V
Input Pulse Levels (I/Os)
GND to 3.0V/GND to 2.4V
Input Rise/Fall Times
2V/ns
Input Timing Reference Levels
1.5V/1.25V
Output Reference levels
1.5V/1.25V
Output Load (for tLZC, tHZC, tLZOE, tHZOE)Fig. C
Output Load (for all other measurements)
Fig. B
Thevenin equivalent:
GND
10%
90%
90%
10%
+3.0/2.4 V
Figure A: Input Waveform
DOUT
Z0 = 50Ω
50
Ω
VL = 1.5/1.25 V
+3.3/2.5 V;
5 pF*
GND
Figure B: Output Load (A)
Figure C: Output Load (B)
* Including scope and jig capacitance
10 pF*
319
Ω / 1667Ω
353
Ω / 1538Ω



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