PFS154 datasheet(43/91 Pages) PADAUK

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PFS154

8bit MTP Type IO Controller

Page 43 of 91

PDK-DS-PFS154_CN_V105 –Jun. 9, 2020

5.12. Comparator

One hardware comparator is built inside the PFS154; Fig. 9 shows its hardware diagram. It can compare

signals between two pins or with either internal reference voltage Vinternal R or internal band-gap reference

voltage. The two signals to be compared, one is the plus input and the other one is the minus input. For the

minus input of comparator can be PA3, PA4, Internal band-gap 1.20V, PB6, PB7 or Vinternal R selected by bit

[3:1] of gpcc register, and the plus input of comparator can be PA4 or Vinternal R selected by bit 0 of gpcc

which comes from Timer2 module. The output can be also inversed the polarity by bit 4 of gpcc register. The

comparator output can be used to request interrupt service.

Fig. 9: Hardware diagram of comparator

5.12.1 Internal reference voltage (Vinternal R)

The internal reference voltage Vinternal R is built by series resistance to provide different level of reference

voltage, bit 4 and bit 5 of gpcs register are used to select the maximum and minimum values of Vinternal R and

bit [3:0] of gpcs register are used to select one of the voltage level which is deivided-by-16 from the defined

maximum level to minimum level. Fig. 10 to Fig. 13 shows four conditions to have different reference voltage

Vinternal R. By setting the gpcs register, the internal reference voltage Vinternal R can be ranged from (1/32)*VDD to

(3/4)*VDD.

gpcs.5=1

gpcs.5=0

gpcs.4=0

gpcs.4=1

16 stages

VDD

MUX

gpcs[3:0]

000

001

010

100

101

MUX

Timer 2

cloc

TM2_CLK

gpcc.4

gpcc.5

gpcs.7

PA0

gpcc.6

gpcc[3:1]

PA3/CIN1-

PA4/CIN4-

Band-gap

PB6/CIN2-

PB7/CIN3-

PA4/CIN+

gpcc.0

interna R

To request interrupt

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