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PIC16F15213 Datasheet(PDF) 55 Page - Microchip Technology |
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PIC16F15213 Datasheet(HTML) 55 Page - Microchip Technology |
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55 / 420 page ![]() Important: The address range 0x2000 to 0x2FEF represents the complete addressable Linear Data Memory for PIC ® devices (up to Bank 50). The actual implemented Linear Data Memory will differ from one device to the other in a family. Unimplemented memory reads as 0x00. Use of the linear data memory region allows buffers to be larger than 80 bytes because incrementing the FSR beyond one bank will go directly to the GPR memory of the next bank. The 16 bytes of common memory are not included in the linear data memory region. 9.6.3 Program Flash Memory To make constant data access easier, the entire Program Flash Memory is mapped to the upper half of the FSR address space. When the MSB of FSRnH is set, the lower 15 bits are the address in program memory which will be accessed through INDF. Only the lower eight bits of each memory location are accessible via INDF. Writing to the Program Flash Memory cannot be accomplished via the FSR/INDF interface. All instructions that access Program Flash Memory via the FSR/INDF interface will require one additional instruction cycle to complete. Figure 9-16. Program Flash Memory Map Filename: 10-000058A.vsd Title: PROGRAM FLASH MEMORY MAP Last Edit: 7/31/2013 First Used: PIC16F1508/9 Note: 0x0000 Program Flash Memory (low 8 bits) 0x7FFF 1 00 77 FSRnH FSRnL Location Select 0x8000 0xFFFF Rev. 10-000058A 7/31/2013 9.7 Register Definitions: Memory Organization PIC16F15213/14/23/24/43/44 Memory Organization © 2020 Microchip Technology Inc. Preliminary Datasheet DS40002195A-page 55 |
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