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MSC8101 Datasheet(PDF) 26 Page - Freescale Semiconductor, Inc |
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MSC8101 Datasheet(HTML) 26 Page - Freescale Semiconductor, Inc |
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26 / 28 page ![]() Silicon Errata for the MSC8101 Processor, Mask 0K40A, Rev. 5 26 Freescale Semiconductor CPM120 SS7_OPT[FISU_PAD] parameter has no effect on the number of flags between FISUs Date Added: 12/22/2004 Description: The SS7_OPT[FISU_PAD] parameter has no effect on the number of flags between FISUs. Regardless of the value of this field, one flag will be present between back-to-back FISUs. Workaround: Use the latest SS7 microcode package provided by Freescale. System Number: 18767 Fix Plan: None at this time. 0K40A CPM121 TDM Data Frame Corruption Date Added: 11/05/2004 Description: During a write to one of the SI registers (GMR, AMR, BMR, CMR, DMR) while one or more TDMs are working, one data frame of a working TDM may become corrupted. Workaround: Work with the shadow RAM when changing data and do not disable and then en- able the TDM. System Number: 17460 0K40A Table 2. Silicon Errata (Continued) Errata Number Errata Description Applies to Mask |
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