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STM32L552CCT3PTR Datasheet(PDF) 56 Page - STMicroelectronics

Part # STM32L552CCT3PTR
Description  Ultra-low-power Arm® Cortex®-M33 32-bit MCUTrustZone®FPU, 165 DMIPS, up to 512 KB Flash memory, 256 KB SRAM, SMPS
PDF  340 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32L552CCT3PTR Datasheet(HTML) 56 Page - STMicroelectronics

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Functional overview
STM32L552xx
56/340
DS12737 Rev 6
3.16
DMA request router (DMAMUX)
When a peripheral indicates a request for DMA transfer by setting its DMA request line, the
DMA request is pending until it is served and the corresponding DMA request line is reset.
The DMA request router allows to route the DMA control lines between the peripherals and
the DMA controllers of the product.
An embedded multi-channel DMA request generator can be considered as one of such
peripherals. The routing function is ensured by a multi-channel DMA request line
multiplexer. Each channel selects a unique set of DMA control lines, unconditionally or
synchronously with events on synchronization inputs.
DMAMUX main features
•
16-channel programmable DMA request line multiplexer output
•
4-channel DMA request generator
•
23 trigger inputs to DMA request generator
•
23 synchronization inputs
•
Per DMA request generator channel:
–
DMA request trigger input selector
–
DMA request counter
–
Event overrun flag for selected DMA request trigger input
•
Per DMA request line multiplexer channel output:
–
90 input DMA request lines from peripherals
–
One DMA request line output
–
Synchronization input selector
–
DMA request counter
–
Event overrun flag for selected synchronization input
–
One event output, for DMA request chaining
•
TrustZone support:
–
Support for AHB secure and non-secure DMA transfers, independently at a
channel level.
–
TrustZone-aware AHB slave port, protecting any secure resource (register,
register field) from a non-secure software access, with configurable interrupt
event.
–
Two secure and non-secure interrupt requests, resulting from any of the
respectively secure and non-secure channels. Each channel event being caused
from any of the two DMAMUX input events: trigger or synchronization overrun,
associated with a respectively secure and non-secure channels.
•
Privileged / Unprivileged support:
–
Support for AHB privileged and unprivileged DMA transfers, independently, at a
channel level.
–
Privileged-aware AHB slave port.



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