STM32WB55CCV6ATR datasheet(31/193 Pages) STMICROELECTRONICS

31 / 193 page

DS11929 Rev 10

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STM32WB55xx STM32WB35xx

Functional overview

3.7.3

Linear voltage regulator

Three embedded linear voltage regulators supply most of the digital and RF circuitries, the

main regulator (MR), the low-power regulator (LPR) and the RF regulator (RFR).



The MR is used in the Run and Sleep modes and in the Stop 0 mode.



The LPR is used in Low-Power Run, Low-Power Sleep, Stop 1 and Stop 2 modes. It is

also used to supply the SRAM2a in Standby with retention.



The RFR is used to supply the RF analog part, its activity is automatically managed by

the RF subsystem.

All the regulators are in power-down in Standby and Shutdown modes: the regulator output

is in high impedance, and the kernel circuitry is powered down, inducing zero consumption.

The ultralow-power STM32WB55xx and STM32WB35xx support dynamic voltage scaling to

optimize its power consumption in run mode. The voltage from the main regulator that

supplies the logic (VCORE) can be adjusted according to the system’s maximum operating

frequency.

There are two voltage and frequency ranges:



Range 1, with the CPU running up to 64 MHz



Range 2, with a maximum CPU frequency of 16 MHz (note that HSE can be active in

this mode). All peripheral clocks are also limited to 16 MHz.

VCORE can also be supplied by the low-power regulator, the main regulator being switched

off. The system is then in Low-power run mode. In this case the CPU is running at up to

2 MHz, and peripherals with independent clock can be clocked by HSI16 (in this mode the

RF subsystem is not available).

3.7.4

Power supply supervisor

An integrated ultra-low-power brown-out reset (BOR) is active in all modes except

Shutdown ensuring proper operation after power-on and during power down. The devices

remain in reset mode when the monitored supply voltage VDD is below a specified

threshold, without the need for an external reset circuit.

The lowest BOR level is 1.71 V at power on, and other higher thresholds can be selected

through option bytes.The device features an embedded programmable voltage detector

(PVD) that monitors the VDD power supply and compares it with the VPVD threshold. An

interrupt can be generated when VDD drops below the VPVD threshold and/or when VDD is

higher than the VPVD threshold. The interrupt service routine can then generate a warning

message and/or put the MCU into a safe state. The PVD is enabled by software.

In addition, the devices embed a peripheral voltage monitor (PVM) that compares the

independent supply voltage VDDA with a fixed threshold to ensure that the peripheral is in its

functional supply range.

Any BOR level can also be used to automatically switch the SMPS step-down converter in

bypass mode when the VDD voltage drops below a given voltage level. The mode of

operation is selectable by register bit, the BOR level is selectable by option byte.

3.7.5

Low-power modes

These ultra-low-power devices support several low-power modes to achieve the best

compromise between low-power consumption, short startup time, available peripherals and

available wakeup sources.

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