TLV9102IDDFR datasheet(13/74 Pages) TI

13 / 74 page

TLV9101, TLV9102, TLV9104

www.ti.com

SBOS943C – FEBRUARY 2019 – REVISED MAY 2020

Product Folder Links: TLV9101 TLV9102 TLV9104

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Table 1. Table of Graphs

DESCRIPTION

FIGURE

Offset Voltage Production Distribution

Figure 1

Offset Voltage Drift Distribution

Figure 2

Offset Voltage vs Temperature

Figure 3, Figure 4

Offset Voltage vs Common-Mode Voltage

, Figure 6, Figure 7, Figure 8

Offset Voltage vs Power Supply

Figure 9

Open-Loop Gain and Phase vs Frequency

Figure 10

Closed-Loop Gain and Phase vs Frequency

Figure 11

Input Bias Current vs Common-Mode Voltage

Figure 12

Input Bias Current vs Temperature

Figure 13

Output Voltage Swing vs Output Current

Figure 14, Figure 15, Figure 16, Figure 17

CMRR and PSRR vs Frequency

Figure 18

CMRR vs Temperature

Figure 19

PSRR vs Temperature

Figure 20

0.1-Hz to 10-Hz Noise

Figure 21

Input Voltage Noise Spectral Density vs Frequency

Figure 22

THD+N Ratio vs Frequency

Figure 23

THD+N vs Output Amplitude

Figure 24

Quiescent Current vs Supply Voltage

Figure 25

Quiescent Current vs Temperature

Figure 26

Open Loop Voltage Gain vs Temperature

Figure 27

Open Loop Output Impedance vs Frequency

Figure 28

Small Signal Overshoot vs Capacitive Load (100-mV Output Step)

Figure 29, Figure 30

Phase Margin vs Capacitive Load

Figure 31

No Phase Reversal

Figure 32

Positive Overload Recovery

Figure 33

Negative Overload Recovery

Figure 34

Small-Signal Step Response (100 mV)

Figure 35, Figure 36

Large-Signal Step Response

Figure 37, Figure 38, Figure 39

Short-Circuit Current vs Temperature

Figure 40

Maximum Output Voltage vs Frequency

Figure 41

Channel Separation vs Frequency

Figure 42

EMIRR vs Frequency

Figure 43

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