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TLV9102IDDFR Datasheet(PDF) 25 Page - Texas Instruments |
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TLV9102IDDFR Datasheet(HTML) 25 Page - Texas Instruments |
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25 / 74 page ![]() C load + ± V in V out +V s R iso -V s Cap Load (pF) 0 40 80 120 160 200 240 280 320 360 5 10 15 20 25 30 35 40 45 50 55 C008 RISO = 0 :, Positive Overshoot RISO = 0 :, Negative Overshoot RISO = 50 :, Positive Overshoot RISO = 50 :, Negative Overshoot Cap Load (pF) 0 40 80 120 160 200 240 280 320 360 3 6 9 12 15 18 21 24 27 30 33 C007 RISO = 0 :, Positive Overshoot RISO = 0 :, Negative Overshoot RISO = 50 :, Positive Overshoot RISO = 50 :, Negative Overshoot 25 TLV9101, TLV9102, TLV9104 www.ti.com SBOS943C – FEBRUARY 2019 – REVISED MAY 2020 Product Folder Links: TLV9101 TLV9102 TLV9104 Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated 7.3.4 Capacitive Load and Stability The TLV910x features a resistive output stage capable of driving moderate capacitive loads, and by leveraging an isolation resistor, the device can easily be configured to drive large capacitive loads. Increasing the gain enhances the ability of the amplifier to drive greater capacitive loads; see Figure 47 and Figure 48. The particular op amp circuit configuration, layout, gain, and output loading are some of the factors to consider when establishing whether an amplifier will be stable in operation. Figure 47. Small-Signal Overshoot vs Capacitive Load (100-mV Output Step, G = 1) Figure 48. Small-Signal Overshoot vs Capacitive Load (100-mV Output Step, G = –1) For additional drive capability in unity-gain configurations, improve capacitive load drive by inserting a small (10 Ω to 20 Ω) resistor, RISO, in series with the output, as shown in Figure 49. This resistor significantly reduces ringing and maintains DC performance for purely capacitive loads. However, if a resistive load is in parallel with the capacitive load, then a voltage divider is created, thus introducing a gain error at the output and slightly reducing the output swing. The error introduced is proportional to the ratio RISO / RL, and is generally negligible at low output levels. A high capacitive load drive makes the TLV910x well suited for applications such as reference buffers, MOSFET gate drives, and cable-shield drives. The circuit shown in Figure 49 uses an isolation resistor, RISO, to stabilize the output of an op amp. RISO modifies the open-loop gain of the system for increased phase margin. Figure 49. Extending Capacitive Load Drive With the TLV9101 7.3.5 Common-Mode Voltage Range The TLV910x is a 16-V, true rail-to-rail input operational amplifier with an input common-mode range that extends 100 mV beyond either supply rail. This wide range is achieved with paralleled complementary N-channel and P-channel differential input pairs, as shown in Figure 50. The N-channel pair is active for input voltages close to the positive rail, typically (V+) – 1 V to 100 mV above the positive supply. The P-channel pair is active for inputs from 100 mV below the negative supply to approximately (V+) – 2 V. There is a small transition region, typically (V+) –2 V to (V+) – 1 V in which both input pairs are on. This transition region can vary modestly with process variation, and within this region PSRR, CMRR, offset voltage, offset drift, noise, and THD performance can be degraded compared to operation outside this region. To achieve best performance with the TLV910x family, avoid this transition region when possible. |
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