AS4LC2M8S1 datasheet(28/28 Pages) ALSC

28 / 28 page

ALLIANCE SEMICONDUCTOR

7/5/00

AS4LC2M8S1

AS4LC1M16S1

Package dimensions

AC test conditions

Capacitance

ƒ = 1 MHz, Ta = 25° C, VCC = 3.3V

Ordering information

Part numbering system

Parameter

Symbol

Signals

Max

Unit

Input capacitance

CIN1

A0 to A11

CIN2

DQM, RAS, CAS, WE, CS, CLK, CKE,

I/O capacitance

CI/O

DQ0 to DQ7 (2M × 8)

DQ0 to DQ15 (1M × 16)

5pF

Package \1/ frequency

–8 ns

–10 ns

–12 ns

TSOP II, 400 mil, 44-pin

AS4LC2M8S1-8TC

AS4LC2M8S1-10TC

AS4LC2M8S1-12TC

TSOP II, 400 mil, 50-pin

AS4LC1M16S1-8TC

AS4LC1M16S1-10TC

AS4LC1M16S1-12TC

AS4

XXXS0

–XX

DRAM prefix

3.3V CMOS

Device number

for synchronous

DRAM

1/frequency

Package (device

dependent):

TSOP II 400 mil, 44 pin

TSOP II 400 mil, 50 pin

Commercial temperature

range: 0° C to 70° C

44-pin TSOP II

50-pin TSOP II

Min

(mm)

Max

(mm)

Min

(mm)

Max

(mm)

A–

1.2

0.05

–

0.05

0.95

1.05

0.95

1.05

0.30

0.45

0.30

0.45

0.127 (typical)

0.12

0.21

18.28

18.54

20.85

21.05

10.03

10.29

10.03

10.29

11.56

11.96

11.56

11.96

0.80 (typical)

0.40

0.60

0.40

0.60

1 2 3 4 5 6 7 8 9 101112 13 14

50 494847 4645 444342 4140393837

1516

36 35

171819 20

343332 31

TSOP II

0–5°

2223 2425

29 28 2726

- Input reference levels of VIH = 2.4V and VIL = 0.4V

- Output reference levels = 1.4V

- Input rise and fall times: 2 ns

CLOAD = 50 pF

DOUT

+1.4V

Figure A: Equivalent output load

50W

Z0 = 50W

AS4LC2M8S1 Datasheet(PDF) 28 Page - Alliance Semiconductor Corporation

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