ADPD107 datasheet(31/66 Pages) AD

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Data Sheet

ADPD105/ADPD106/ADPD107

Rev. A | Page 31 of 66

PD8

PD1

PD8

PD1

PD8

Figure 37. Photodiode Configuration Options for the ADPD105 LFCSP

Table 22. Typical Photodiode Anode to Input Channel Connections for the ADPD105 LFCSP1, 2

Input Channel

Photodiode Anode Configuration

PD1

PD2

PD3

PD4

PD5

PD6

PD7

PD8

Single Photodiode (PD1)

Two Photodiodes (PD1, PD2)

Four Photodiodes (PD1 to PD4)

Eight Photodiodes (PD1 to PD8)

1 Dx refers to the diode connected to the specified channel.

2 NC means do not connect under the conditions provided in Table 21. Leave all unused inputs floating.

LED DRIVER PINS AND LED SUPPLY VOLTAGE

The LEDX1, LEDX2, and LEDX3 pins have an absolute maximum

voltage rating of 3.6 V. Any voltage exposure over this rating affects

the reliability of the device operation and, in certain circumstances,

causes the device to cease proper operation. The voltage of the

LEDx pins must not be confused with the supply voltages for the

LED themselves (VLEDx). VLEDx is the voltage applied to the anode of

the external LED, whereas the LEDXx pin is the input of the

internal current driver, and the pins are connected to the

cathode of the external LED.

LED DRIVER OPERATION

The LED driver for the ADPD105/ADPD106/ADPD107 is a

current sink. The compliance voltage, measured at the driver

pin with respect to ground, required to maintain the

programmed LED current level is a function of the current

required. Figure 15 shows the typical compliance voltages

required at the various coarse LED settings. Figure 38 shows the

basic schematic of how the ADPD105/ADPD106/ADPD107

connect to an LED through the LED driver. The Determining the

Average Current and the Determining CVLED sections define the

requirements for the bypass capacitor (CVLED) and the supply

voltages of the LEDs (VLEDx).

ADPD105/

ADPD106/

ADPD107

LEDx

LGND

VLEDx

SUPPLY

CVLED

Figure 38. VLEDx Supply Schematic

DETERMINING THE AVERAGE CURRENT

The ADPD105/ADPD106/ADPD107 drive an LED in a series of

short pulses. Figure 39 shows the typical ADPD105/ADPD106/

ADPD107 configuration of a pulse burst sequence.

ILED_MAX

3µs

19µs

Figure 39. Typical LED Pulse Burst Sequence Configuration

ADPD107 Datasheet(PDF) 31 Page - Analog Devices

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