ADRF5019

Data Sheet

Rev. 0 | Page 6 of 12

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

Figure 4. Pin Configuration (Top View)

Table 4. Pin Function Descriptions

Pin No.

Mnemonic

Description

1, 2, 4 to 6, 8, 13, 15, 16

GND

Ground. These pins must be connected to the RF and dc ground of the PCB.

3

RFC

RF Common Port. This pin is dc-coupled to 0 V and ac matched to 50 Ω. No dc blocking capacitor is

required when the RF line potential is equal to 0 V dc. See Figure 5 for the interface schematic.

7

RF2

RF Throw Port 2. This pin is dc-coupled to 0 V and ac matched to 50 Ω. No dc blocking capacitor is

required when the RF line potential is equal to 0 V dc. See Figure 5 for the interface schematic.

9

Negative Supply Voltage Pin. See Figure 8 for the interface schematic.

10

Control Input Pin. See Figure 6 for interface schematic. See Table 5 for the truth table.

11

LS

Logic Select Input Pin. See Figure 6 for the interface schematic. See Table 5 for the truth table.

12

Positive Supply Voltage Pin. See Figure 7 for the interface schematic.

14

RF1

RF Throw Port 1. This pin is dc-coupled to 0 V and ac matched to 50 Ω. No dc blocking capacitor is

required when the RF line potential is equal to 0 V dc. See Figure 5 for the interface schematic.

EPAD

Exposed Pad. The exposed pad must be connected to the RF and dc ground of the PCB.

INTERFACE SCHEMATICS

Figure 5. RFC, RF1, and RF2 Pin Interface Schematic

Figure 6. Digital Pins Interface Schematic

12

11

10

1

3

4

9

2

TOP VIEW

(Not to Scale)

ADRF5019

GND

GND

RFC

GND

LS

NOTES

1. EXPOSED PAD. THE EXPOSED PAD MUST BE

CONNECTED TO THE RF AND DC GROUND

OF THE PCB.

RFC, RF1, RF2

GND

GND

CLAMP

GND

GND

CLAMP