MCP6006 datasheet(16/46 Pages) MICROCHIP

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MCP6006/6R/6U/7/9

DS20006411B-page 16

 2020-2021 Microchip Technology Inc.

4.1.4

NORMAL OPERATION

The input stage of the MCP6006/6R/6U/7/9 op amp

uses two differential input stages in parallel. One oper-

ates at a low Common-Mode Input Voltage (VCM), while

the other operates at a high VCM. With this topology,

the device operates with a VCM of up to 300 mV above

VDD and 300 mV below VSS. The input offset voltage is

measured at VCM = VSS – 0.3V and VDD + 0.3V to

ensure proper operation.

The transition between the input stages occurs when

VCM is near VDD – 0.9V (see Figures 2-3 and 2-4). For

the best distortion performance and gain linearity with

noninverting gains, avoid this region of operation.

4.2

Rail-to-Rail Output

The output voltage range of the MCP6006/6R/6U/7/9

op amp is 0.006V (typical) and 5.494V (typical) when

RL = 10 k is connected to VDD/2 and VDD = 5.5V.

Refer to Figures 2-16 and 2-17 for more information.

4.3

Start-up

The MCP6006/6R/6U/7/9 family of parts quickly

controls the output when power (VDD) is initially applied

to the device (start-up). Bypass capacitors are

removed during the start-up testing to minimize inrush

currents (see Figure 4-3). When the op amp is con-

trolled and is off, the output impedance is high and

VOUT is VL or 1V. When the op amp turns on, the output

becomes low-impedance and VOUT follows the input

sine wave; this is used as the start-up time.

FIGURE 4-3:

Start-up Test Circuit.

Figure 4-4 shows the output voltage for the MCP6007

and a similar op amp from a competitor, while Figure 4-5

shows the inrush current. When power is first applied to

the MCP6007, the output is turned off (Point B) and

driven by the load. After 6 µs, the output is turned on

(Point C) and VOUT follows the input sine wave. Mean-

while, the competitor’s output is uncontrolled during the

first 4 µs (Point A) and has some distortion on the output

(Point D) prior to turning on after 50 µs (Point E).

FIGURE 4-4:

Start-up Time Voltages.

FIGURE 4-5:

IDD During Start-up.

VDD

VSS

VL = 1V

VDD

VOUT

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