M69KB096AA datasheet(41/48 Pages) STMICROELECTRONICS

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M69KB096AA

Note: 1. WE# LOW time must be limited to tCEM (8 µs).

2. These timings have been obtained with the AC Measurement Load Circuit shown on Figure 14. The transition timings measure a

transition of 100 mV between the High-Z level (VCCQ/2) and VOH or VOL.

3. These timings have been obtained with the AC Measurement Load Circuit shown on Figure 14. The High-Z timings measure a tran-

sition of 100 mV between VOH or VOL and VCCQ/2.

Figure 30. Synchronous Burst Write AC Waveform

Note: 1. Non default BCR Register settings: Latency code two (three clocks); WAIT active Low; WAIT asserted during delay.

2. Clock rates lower than 50MHz (clock period higher than 20ns) are allowed as long as tELKH specifications are met.

tEHTZ

tBHTZ

tWHTZ

tHZ

Chip Enable High to WAIT Hi-Z

LB/UB High to WAIT Hi-Z

Write Enable High to WAIT Hi-Z

Symbol

Alt.

Parameter

M69KB096AA

Unit

70ns

85ns

Min

Max

Min

Max

tAVEL

tAVWL

tAVBL

tLLWL

tELWL

tAS

Address Setting Time

µs

tLHAX

tAVH

L High to Address Transition

A0-A21

WAIT

D0-D15

tKHKH

VALID

ADDRESS

tKHDX

tELKH

tWHKH

tKHWH

tAVKH

WRITE Burst Identified

tKHTV

Hi-Z

VALID

INPUT

Hi-Z

AI06792b

(W = Low)

tKHEH

tEHEL

tBLKH

tKHBH

LB/UB

tELTV

tDVKH

VALID

INPUT

VALID

INPUT

VALID

INPUT

tELEH

tLLKH

tKHLH

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