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AT25DF641A Datasheet(PDF) 51 Page - Dialog Semiconductor |
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AT25DF641A Datasheet(HTML) 51 Page - Dialog Semiconductor |
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51 / 58 page ![]() 50 AT25DF641A [DATASHEET] 8793F–DFLASH–11/2017 14.6 Program and Erase Characteristics Notes: 1. Maximum values indicate worst-case performance after 100,000 erase/program cycles. 2. Not 100% tested (value guaranteed by design and characterization). 14.7 Power-Up Conditions 14.8 Input Test Waveforms and Measurement Levels 14.9 Output Test Load Symbol Parameter Min Typ Max Units tPP(1) Page Program Time (256 bytes) 2.5 6.0 ms tBP Byte Program Time 30 µs tBLKE(1) Block Erase Time 4KB 75 200 ms 32KB 300 600 64KB 600 1100 tCHPE(1)(2) Chip Erase Time 70 150 sec tSUSP Program/Erase Suspend Time Program 10 20 µs Erase 25 40 tRES Program/Erase Resume Time Program 10 20 µs Erase 12 20 tOTPP (1) OTP Security Register Program Time 200 500 µs tWRSR(2) Write Status Register Time 200 ns Symbol Parameter Min Max Units tVCSL Minimum VCC to Chip Select Low Time 70 µs tPUW Power-Up Device Delay Before Program or Erase Allowed 10 ms VPOR Power-On Reset Voltage 1.5 2.5 V AC Driving Levels AC Measurement Level 0.1V CC V CC/2 0.9V CC tR, tF < 2 ns (10% to 90%) Device Under Test 15pF (frequencies above 70MHz) or 30pF |
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