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AT25DF641A Datasheet(PDF) 23 Page - Dialog Semiconductor

Part # AT25DF641A
Description  64-Mbit, 2.7V Minimum SPI Serial Flash Memory with Dual?밒/O Support
PDF  58 Pages
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Manufacturer  DIALOG [Dialog Semiconductor]
Direct Link  http://www.dialog-semiconductor.com/
Logo DIALOG - Dialog Semiconductor

AT25DF641A Datasheet(HTML) 23 Page - Dialog Semiconductor

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AT25DF641A [DATASHEET]
8793F–DFLASH–11/2017
9.2
Write Disable
The Write Disable command is used to reset the Write Enable Latch (WEL) bit in the Status Register to the Logical 0
state. With the WEL bit reset, all Byte/Page Program, erase, Protect Sector, Unprotect Sector, Sector Lockdown, Freeze
Sector Lockdown State, Program OTP Security Register, and Write Status Register commands will not be executed.
Other conditions can also cause the WEL bit to be reset; for more details, see Section 11.1.5, “WEL Bit” on page 37 in
“Status Register Commands” .
To issue the Write Disable command, the CS pin must first be asserted and then the opcode 04h must be clocked into
the device. No address bytes need to be clocked into the device, and any data clocked in after the opcode will be
ignored. When the CS pin is deasserted, the WEL bit in the Status Register will be reset to a Logical 0. The complete
opcode must be clocked into the device before the CS pin is deasserted, and the CS pin must be deasserted on an even
byte boundary (multiples of eight bits); otherwise, the device will abort the operation and the state of the WEL bit will not
change.
Figure 9-2. Write Disable
SCK
CS
SI
SO
MSB
23
1
0
00000100
67
5
4
Opcode
High-impedance



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