IMX7ULPCEC datasheet(9/118 Pages) NXP

9 / 118 page

Table 1. i.MX 7ULP modules list (continued)

Block Name

Block Mnemonic

Subsystem

Power

Domain

Brief description

both in on-chip RAM and in off-chip,

nonvolatile memory. For details, see the

i.MX 7ULP Security Reference Manual.

Cyclic Redundancy

Check

CRC

Connectivity and

Communications

The Cyclic Redundancy Check (CRC)

module is a hardware CRC generator

circuit using 16/32-bit shift register. The

CRC module supports error detection

for all single, double, odd, and most

multi-bits errors, programmable initial

seed value, and optional feature to

transpose input data and CRC result via

transpose register.

Debug Access Port

DAP

Debug

Debug Port Access (DAP) provides

debugger access to on-chip system

resources via the SWJ-DP port. The

DAP provides internal system access to

A7 Debug Port, M4 Debug Port, System

Bus, JTAG controller, and SoC Control

and Status. The DAP also enables

system access to CoreSight debug

subsystem through the APBIC port.

Digital PMC

Power Management

SYS

The Digital PMC module allows user

software to control power modes of the

chip and to optimize power consumption

for the level of functionality needed.

There are two instances of Digital PMC

on this device, one for each main power

domain.

Digital-to-Analog

Converter

DAC0-1

Analog

Digital-to-Analog Converter (DAC) is the

12-bit resolution digital-to-analog

converters with programmable

reference generator output. The output

of the DAC can be placed on an

external pin or set as one of the inputs

to the analog comparator or ADC. The

DAC is capable of achieving 1 ms

conversion rate for high-speed signals

and 2 ms conversion rate for low-speed

signals.

Direct Memory

Access

DMA0-1

DMA and Bus Fabrics AD, RT

Direct Memory Access (DMA) is

capable of performing complex data

transfers with minimal intervention from

a host processor. Each DMA module

supports 32 DMA channels. The

transfer control descriptors for each of

the 32 channels locate in system

memory. DMA0 is in the real-time

domain. DMA1 is in the application

domain.

Table continues on the next page...

i.MX 7ULP modules list

i.MX 7ULP Applications Processor—Consumer Products, Rev. 0, 06/2019

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