PCF8545ATT datasheet(28/48 Pages) NXP

28 / 48 page

PCE85176AUG

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Product data sheet

Rev. 1 — 12 January 2015

28 of 48

NXP Semiconductors

PCE85176AUG

4 × 40 LCD segment driver for Chip-On-Glass

8.6 Input filters

To enhance noise immunity in electrically adverse environments, RC low-pass filters are

provided on the SDA and SCL lines.

8.7 I2C-bus protocol

Two I2C-bus slave addresses (0111 000 and 0111 001) are used to address the

PCE85176AUG. The entire I2C-bus slave address byte is shown in Table 22.

The PCE85176AUG is a write-only device and will not respond to a read access, therefore

bit 0 should always be logic 0. Bit 1 of the slave address byte that a PCE85176AUG

responds to, is defined by the level tied to its SA0 input (VSS for logic 0 and VDD for

logic 1).

The I2C-bus protocol is shown in Figure 21. The sequence is initiated with a START

condition (S) from the I2C-bus master which is followed by one of two possible

PCE85176AUG slave addresses available.

The last command byte sent is identified by resetting its most significant bit, continuation

bit C (see Figure 22).

Table 22.

I2C slave address byte

Slave address

Bit

MSB

LSB

SA0

R/W

Fig 21. I2C-bus protocol

Fig 22. Format of command byte

PCF8545ATT Datasheet(PDF) 28 Page - NXP Semiconductors