MIC2810

DS20005910B-page 14

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2017 - 2022 Microchip Technology Inc. and its subsidiaries.

3.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 3-1.

3.1

LOWQ

The LOWQ pin provides a logic level control between

the internal PWM switching regulator mode, and the

low noise linear regulator mode. With LOWQ pulled low

(≤ 0.2V), quiescent current of the device is greatly

reduced by switching to a low noise linear regulator

mode that has a typical supply current of 38 µA. In

linear (LDO) mode, the output can deliver 60 mA of

current to the output. By placing LOWQ high (≥ 1V), the

device transitions into a constant frequency PWM

step-down regulator mode. This allows the device the

ability to efficiently deliver up to 600 mA of output

current at the same output voltage.

LOWQ mode also limits the output load of both LDO1

and LDO2 to less than 50 mA.

3.2

BIAS

The BIAS pin supplies the power to the internal control

through an internal 6Ω resistor. A small 0.1 µF

capacitor is required for bypassing.

3.3

SGND

Signal ground (SGND) is the ground path for the

biasing and control circuitry. The current loop for the

signal ground should be as small as possible.

3.4

PGND

Power ground (PGND) is the ground path for the high

current PWM mode. The current loop for the power

ground should be as small as possible.

TABLE 3-1:

PIN FUNCTION TABLE

Pin Number Pin Name

Description

1

LOWQ

LOWQ Mode. Active Low Input. Logic High = Full Power Mode; Logic Low = LOWQ

Mode; Do not leave floating.

2

BIAS

Internal circuit bias supply. It must be decoupled to signal ground with a 0.1 µF

capacitor and should not be loaded.

3

SGND

Signal ground.

4

PGND

Power ground.

5

SW

Switch (Output): Internal power MOSFET output switches.

6

Supply Input – DC/DC and other circuitry shared with LDO1 and LDO2. Must be

connected to Pin 7.

7

Supply Input – LDO2. Must be connected to Pin 6.

8

LDO2

Output of LDO regulator 2.

9

LDO

10

Supply Input – LDO1.

11

LDO1

Output of LDO regulator 1.

12

POR

Power-on Reset Output: Open-drain output. Active low indicates an output

undervoltage condition on either one of the three regulated outputs.

13

Delay Set Input: Connect external capacitor to GND to set the internal delay for the

POR output. When left open, there is a minimum delay. This pin cannot be grounded.

14

EN1

Enable Input (LDO1). Active High Input. Logic high = On; Logic low = Off; do not leave

floating.

15

EN

Enable Input (DC/DC). Active High Input. Logic High = On; Logic Low = Off; Do not

leave floating.

16

EN2

Enable Input (LDO2). Active High Input. Logic high = On; Logic low = Off; do not leave

floating.