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TAS2780 Datasheet(PDF) 3 Page - Texas Instruments |
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TAS2780 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 97 page ![]() 5 Pin Configuration and Functions Figure 5-1. 30-Pin HR-QFN Package - Bottom View Table 5-1. Pin Functions PIN I/O DESCRIPTION NAME NO. ADDR 23 I Address detect pin. Resistor value at this pin selects the I2C address. See Section 8.3.1. AVDD 24 P Analog power input. Connect to 1.8V supply and decouple to GND with a capacitor. BST_N 30 P Class-D negative bootstrap. Connect a capacitor between BST_N and OUT_N. BST_P 4 P Class-D positive bootstrap. Connect a capacitor between BST_P and OUT_P. BYP_EN 11 O Low voltage signaling pin with open drain output. It can be used to enable/disable an external DC-DC converter. DGND 25 P Device substrate ground. Connect to PCB ground plane. Avoid any common routing inductance between this pin and GND pin. DREG 10 P Digital core voltage regulator output. Bypass to GND with a capacitor. Do not connect to external load. FSYNC 14 I Frame Synchronization Clock. GND 7 P Analog ground. Connect to PCB ground plane. ICC 6 IO Inter-chip communication pin. IOVDD 20 P Digital IO power supply. Connect to an 1.8V or a 3.3V supply and decouple with a capacitor to GND. IRQZ 21 O Open drain, active low, interrupt pin. Pull up to IOVDD with resistor if optional internal pull up is not used. NC 8, 9, 16, 17 Not Connected. OUT_N 29 O Class-D negative output. OUT_P 3 O Class-D positive output. PGND 2 P Class-D ground. Connect to PCB ground plane. PVDD 28 P Class-D power supply input. Decouple with a capacitor. PVDD_SNS 26 I PVDD remote sense pin. SBCLK 15 I Serial Bit Clock. SCL 18 I I2C Clock Pin. Pull up to IOVDD with a resistor. SDA 19 IO I2C Data Pin. Pull up to IOVDD with a resistor. www.ti.com TAS2780 SLOSE75A – FEBRUARY 2022 – REVISED JUNE 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: TAS2780 |
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