TUSB2E11 datasheet(32/58 Pages) TI

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10. If an ACK is received, the TUSB2E11 transmits the next byte of data as long as host provides the clock. If a

NAK is received, the TUSB2E11 stops providing data and waits for a stop condition (P).

11. The host terminates the read operation by generating a stop condition (P).

Figure 8-9. I2C Write Without Data

The following procedure should be followed for setting a starting sub-address for I2C reads (refer to Figure 8-9).

1. The host initiates a write operation by generating a start condition (S), followed by the TUSB2E11 7-bit

address and a zero-value “W/R” bit to indicate a write cycle.

2. The TUSB2E11 acknowledges the address cycle.

3. The host presents the register offset within TUSB2E11 to be written, consisting of one byte of data, MSB-

first.

4. The TUSB2E11 acknowledges the register offset cycle.

5. The host terminates the write operation by generating a stop condition (P).

Note

After initial power-up, if no register offset is included for the read procedure (refer to Figure 8-7),

then reads start at register offset 00h and continue byte by byte through the registers until the I2C

host terminates the read operation. During a read operation, the TUSB2E11 auto-increments the I2C

internal register address of the last byte transferred independent of whether or not an ACK was

received from the I2C host.

tBUF

tHDSTA

tLOW

tHDDAT

HIGH

tSUDAT

tSUSTA

tHDSTA

tSUSTO

SDA

SCL

30%

70%

30%

70%

Figure 8-10. I2C Timing Diagram

9 Register Access Protocol (RAP)

The repeater in TUSB2E11 supports the register access protocol (RAP) over eUSB2 to allow access to its

related registers.

RAP accessible registers are indicated with corresponding RAP addresses in the register map. Default value of

a subset of the registers are factory programmable and are indicated in register map.

TUSB2E11

SLLSFI4A – NOVEMBER 2021 – REVISED JUNE 2022

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