LT3756 datasheet(16/30 Pages) AD

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LT8355-1

Rev. 0

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APPLICATIONS INFORMATION

at start-up or after faults, when the output is still low.

During start-up, or when restarting after faults, switching

frequency will drop to around 20% of its nominal value,

and step-up over the duration of around 256 times the

nominal switching period. For more information about

this, see the Soft-Start section.

The internal dimming PWM generator clock runs at

approximately fSW1/1000. Spread spectrum frequency

modulation for the switch clock does not affect the PWM

generator clock, which continues to run at fSW1(MIN)/1000.

Pulse Width Modulation (PWM) Dimming

Pulse width modulation (PWM) allows high dynamic

range dimming of the LED load. When using PWM dim-

ming, a pulse train with duty ratio proportional to desired

LED current controls the load. During ON periods, the

part operates normally. During OFF periods the part stops

switching. While the part is not switching, the compen-

sation node is high impedance to minimize changes to

the compensation capacitor voltage. This reduces tran-

sient settling time when the next ON period arrives. In

addition to this, the LT8355-1 provides an optional load

disconnect. Disconnecting the load makes turn-off much

faster, as the output capacitor does not continue to con-

duct current into the load. Transient settling time is also

shorter when turning back ON, as the output capacitor’s

state is less affected by the load. To use the external load

disconnect, tie a PMOS in series with the load such that

the source of the PMOS connects to the ISN node, and

the drain to the LED load. Connect the gate of the PMOS

to the PWMTG pin. The voltage at the PWMTG pin will

vary between VISP and VISP – 8.5V (typical) to turn the

PMOS off and on. Note that this configuration works for

any of the supported power stage topologies. For more

information on power stage topologies, see the Typical

Applications section.

The PWM1,2 pins allow two modes of PWM dimming.

The first mode is external PWM. In this mode, a digital

signal created by some other device, such as a micro-

processor, drives the PWM1,2 pins. This PWM signal

directly controls the part: when this signal is high, the

Figure 4. PWM Duty vs PWM1,2 Pin Voltages

corresponding channel runs, when this signal is low, the

corresponding channel does not run, and disconnects

the load if an external PMOS is used. Tying the PWM1,2

pins to INTVCC or VREF results in continuous, uninter-

rupted operation. Conversely, tying the PWM1,2 pins to

ground results in the system remaining idle indefinitely.

External PWM dimming can support ON periods shorter

than 500ns, allowing a PWM dimming dynamic range of

20,000:1 at 100Hz. Careful design of the wiring, includ-

ing short cabling to reduce parasitic inductance, to the

LED load improves turn on speed and regulation accu-

racy for brief (<1µs), high current (>0.5A) pulses. While

sub-microsecond PWM dimming ON times are supported

by LT8355-1, very brief OFF times (<0.3µs) are not sup-

ported. This means that negative going glitches on the

CTRL1,2; IADJ2; and PWM1,2 pins should be avoided.

The second mode of PWM dimming is internal.

When using internal PWM dimming, the analog voltages

at the PWM1,2 pins control the duty ratio of the PWMTG

signal. The voltage range for internal PWM dimming is

from 0.5V to 1.5V at the PWM1,2 pins. The internal PWM

generator converts the voltages at the PWM1,2 pins to

a 7-bit digital representation. The analog-to-digital con-

verter responsible for this uses a linear scale, each code

is around 7.8mV wide. Each 7-bit code corresponds to

a unique duty ratio value. The values of duty ratio are

separated exponentially. Refer to Figure 4 for a graphical

representation of this relationship and Table 2 for recom-

mended PWM voltage for selected PWM Duties.

PWM1,2 PIN VOLTAGE (V)

0.50

0.75

1.25

1.50

1.75

0.5

100

8355-1 F04

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