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SH79F3283P/044PR Datasheet(PDF) 9 Page - SINOWEALTH Electronic Ltd |
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SH79F3283P/044PR Datasheet(HTML) 9 Page - SINOWEALTH Electronic Ltd |
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9 / 144 page ![]() SH79F3283 9 (continue) Interrupt & Reset & Clock & Power INT0 - INT3 I External interrupt 0-3 input source INT40 - INT47 I External interrupt 40-47 input source RST ———— I The device will be reset by a low voltage on this pin longer than 10us, an internal resistor about 30 kΩ to VDD, So using only an external capacitor to GND can cause a power-on reset. XTAL1 I Oscillator input XTAL2 O Oscillator output XTALX1 I Oscillator X input XTALX2 O Oscillator X output VSS P Ground VDD P Power supply (2.0 - 5.5V) Buzzer BUZ O Buzzer output pin Programmer TDO (P1.0) O Debug interface: Test data out TMS (P1.1) I Debug interface: Test mode select TDI (P1.2) I Debug interface: Test data in TCK (P1.3) I Debug interface: Test clock in SWE (P1.0) I/O Single simulation interface. If the power on or down slope of VDD is greater than 500ms/V, it is recommended to connect 47k-1m resistor to GND or VDD to increase the stability of the chip Note: When P1.0-1.3 used as debug interface, functions of P1.0-1.3 are blocked. |
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