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TDA7803A-QLX Datasheet(PDF) 43 Page - STMicroelectronics |
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TDA7803A-QLX Datasheet(HTML) 43 Page - STMicroelectronics |
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43 / 72 page ![]() DS12195 Rev 7 43/72 TDA7803A I2C bus interface 71 9 I2C bus interface Data transmission from microprocessor to the TDA7803A and viceversa takes place through the 2 wires I2C bus interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected). When I2C bus is active, the user can select the IC's operating mode. The diagnostic cycle results are stored into the data byte, and read the instruction and data bytes back. The protocol used for the bus is depicted in Figure 44 and comprises: a start condition (S) a chip Address byte (the LSB bit determines read/write transmission) a Subaddress byte a sequence of Data (N-bytes + acknowledge) a stop condition (P) Figure 44. I2C bus protocol description Description: S = Start R/W = '0' => Receive-Mode (Chip could be programmed by uP) I = Auto increment; when 1, the address is automatically incremented for each byte transferred A = Acknowledge P = Stop MAX CLOCK SPEED 400kbit/sec There are four I2C addresses (for PowerSO36 package): 1101100, 1101101, 1101110, 1101111. For Flexiwatt package only the 1101100 is available. S A A P = 1 1 0 1 1 I = = GAPG1504160751PS Data Subaddress Address DATA Address DATA SUBA6 DATA SUBA5 DATA SUBA4 Subaddress DATA SUBA3 DATA SUBA2 ADD2 Data DATA SUBA1 ADD1 DATA SUBA0 R/W |
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