MFS5600AMBA0ES datasheet(34/111 Pages) NXP

34 / 111 page

NXP Semiconductors

FS5600

Automotive buck regulator and controller with voltage monitors and watchdog timer

devices. The pins can be configured to perform other functions in the ASIL B and

Enhanced ASIL B versions.

OTP_GPO1/2/3_DELAY[2:0] sets the delay from SW1 or SW2’s soft-start ramp start

(which occurs first) to GPO1/2/3 being released high.

GPIO1/2/3_OUTPUT bit is set high internally, if programmed as part of the start-up based

on the OTP_GPIO1/2/3_DELAY[2:0] bits, and can be changed by the user via I2C after

power-up. After power-up, the GPIO1/2/3 pins may be toggled via I2C using the bits

GPIO1_OUTPUT, GPIO2_OUTPUT and GPIO3_OUTPUT respectively. When both EN1

and EN2 are brought low, the GPOs power down in the reverse sequence of their power-

up delays.

GPO1/2/3 pins are open-drain and need an external pullup resistor. GPIO2 pin can be

configured as SYNCOUT in a push-pull mode. See Section 14.6 for details.

PGOOD1/2 can also be delayed during start-up as shown in Table 31.

OTP_PGOOD1_DELAY[2:0]

OTP_PGOOD2_DELAY[2:0]

OTP_GPO1_DELAY[2:0]

OTP_GPO2_DELAY[2:0]

OTP_GPO3_DELAY[2:0]

Delay duration (µs)

000

GPO1/2/3 held low through power-up.

No additional delay for PGOOD1/2 release.

001

250

010

500

011

1000

100

2000

101

4000

110

8000

111

16000

Table 31. PGOOD1/2, GPIO1/2/3 delay selection

15.5 MODE pin

The MODE/SYNCIN pin can be configured as a MODE input via OTP by setting

OTP_MODE_SYNCINB = 1. The switching mode of SW1 and SW2 regulators can be

changed by toggling with MODE pin.

When MODE = 0, SW1 and SW2 operate in continuous PWM mode.

When MODE = 1, SW1 and SW2 operate in PFM mode. In this condition, several

internal circuits are turned off to achieve low quiescent current operation. PGOOD1

and PGOOD2 outputs indicate regulation status of SW1 and SW2 respectively in this

condition.

Note: OTP_ULPM_EN = 1 for all QM devices to achieve the low quiescent current.

OTP_ULPM_EN may be set to 0 or 1 for ASIL B and Enhanced ASIL B variations to

achieve different behavior. See Section 17.13.9 for details.

FS5600

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 2 August 2022

34 / 111

MFS5600AMBA0ES Datasheet(PDF) 34 Page - NXP Semiconductors

MFS5600AMBA0ES Datasheet(HTML) 34 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL