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AM69AX Datasheet(PDF) 281 Page - Texas Instruments

Part # AM69AX
Description  AM69Ax Processors, Silicon Revision 1.0
PDF  299 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

AM69AX Datasheet(HTML) 281 Page - Texas Instruments

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10 Device Connection and Layout Fundamentals
10.1 Power Supply Decoupling and Bulk Capacitors
10.1.1 Power Distribution Network Implementation Guidance
The Sitara Processor Power Distribution Networks: Implementation and Analysis provides guidance for
successful implementation of the power distribution network. This includes PCB stackup guidance as well as
guidance for optimizing the selection and placement of the decoupling capacitors. TI supports only designs that
follow the board design guidelines contained in the application report.
10.2 External Oscillator
For more information about External Oscillators, see Clock Specifications.
10.3 JTAG and EMU
Texas Instruments supports a variety of eXtended Development System (XDS) JTAG controllers with various
debug capabilities beyond only JTAG support. A summary of this information is available in the XDS Target
Connection Guide.
For more recommendations on EMU routing, see Emulation and Trace Headers Technical Reference Manual
10.4 Reset
The device incorporates four external reset pins (MCU_PORz, MCU_RESETz, PORz, and RESET_REQz) and
two reset status pins (MCU_RESETSTATz and RESETSTATz). These pins can be driven by an external power
good circuitry or Power Management IC (PMIC). MCU_PORz and Main PORz pins should be held active low
during the entire power-up phase, and until all power supplies as well as the HFOSC0 clock are stable.
All MCU domain resets act as master resets to the whole device, whereas Main domain resets only reset Main
domain (MCU domain is reset isolated from all Main domain resets).
10.5 Unused Pins
For more information about Unused Pins, see Pin Connectivity Requirements
10.6 Hardware Design Guide for JacintoTM 7 Devices
The Hardware Design Guide for JacintoTM 7 Devices document describes hardware system design
considerations for the JacintoTM 7 family of processors.This design guide is intended to be used as an aid
during the development of application hardware.
www.ti.com
AM69A
SPRSP92 – FEBRUARY 2023
Copyright © 2023 Texas Instruments Incorporated
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Product Folder Links: AM69A



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