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AM85C30-8PC Datasheet(PDF) 22 Page - Advanced Micro Devices |
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AM85C30-8PC Datasheet(HTML) 22 Page - Advanced Micro Devices |
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22 / 68 page ![]() AMD 22 Am85C30 Write Register 11 D7 D6 D5 D4 D3 D2 D1 D0 Write Register 7 D7 D6 D5 D4 D3 D2 D1 D0 Auto Tx Flag Auto EOM Latch Reset Auto RTS TxD Pulled High in SDLC NRZI Mode Fast DTR/REQ Mode CRC Check Bytes Completely Received Extended Read Enable Must Be Set to 0 0 0 1 1 0 1 0 1 0 0 1 1 0 1 0 1 0 0 1 1 0 1 0 1 Write Register 9 D7 D6 D5 D4 D3 D2 D1 D0 VIS NV DLC MIE Status High/ Status Low Interrupt Masking without INTACK* 0 0 1 1 0 1 0 1 No Reset Channel Reset B Channel Reset A Force Hardware Reset D7 D6 D5 D4 D3 D2 D1 D0 SYNC7 SYNC5 SYNC5 SYNC11 0 SYNC6 SYNC4 SYNC14 SYNC10 1 SYNC5 SYNC3 SYNC13 SYNC9 1 SYNC4 SYNC2 SYNC12 SYNC8 1 SYNC3 SYNC1 SYNC11 SYNC7 1 SYNC2 SYNC0 SYNC10 SYNC6 1 SYNC1 1 SYNC9 SYNC5 1 SYNC0 1 SYNC8 SYNC4 0 Monosync 8 Bits Monosync 8 Bits Bisync 16 Bits Bisync 12 Bits SDLC Write Register 7 *Added Enhancement TRxC O/I TRxC Out = XTAL Output TRxC Out = Transmit Clock TRxC Out = BR Generator Output TRxC Out = DPLL Output Transmit Clock = RTxC Pin Transmit Clock = TRxC Pin Transmit Clock = BR Generator Output Transmit Clock = DPLL Output Receive Clock = RTxC Pin Receive Clock = TRxC Pin Receive Clock = BR Generator Output Receive Clock = DPLL Output RTxC XTAL/No XTAL ′ Figure 9. Write Register Bit Functions (continued) 10216F-13 |
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