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6.2.19 CCC_MSBY

Offset

Bit Position

0x19

Reset

0x00

Access

Name

Table 6.19. CCC_MSBY

Bit

Name

Reset

Access

Description

7:0

CCC_MSBY

0x00

read-only

Most significant byte of Coulomb counter for VOC in

LDOC stand-alone mode. Each count represents a num-

ber of PFM pulses, determined by the prescaler setting

(CC_CTRL.CC_PRESCL).

Note that during the calibratin of all 3 Coulomb Counters,

the CCC counter is used for counting the 10MHz clock cy-

cles that occur during the calibration event. Until the next

subsequent CC_CLR event, reading the CCC_MSBY and

CCC_LSBY registers returns the 16-bit result from the

10MHz counting operation. To preserve any existing count

in the CCC counter, firmware should read and store the

CCC registers before initiating a Coulomb Counter calibra-

tion event.

Note that this value is spread over 2 registers and may be

continuously updated. To ensure that the capture of the

process, addressing this read-only register causes an in-

hibition in the updating of the register. Because this can

result in some small amount of missed Coulomb counter

counts, users should address these registers only when

they are actively reading them.

To ensure coherence when reading the most significant

and least significant bytes, a MSBY register read causes

the corresponding LSBY register value to be stored into a

shadow register. Reading the LSBY register will then re-

turn the value stored in the LSBY shadow register.

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