HC705JJ7GRSSLASHD datasheet(180/230 Pages) NXP

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EPROM/OTPROM

General Release Specification

MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0

EPROM/OTPROM

13.3.1 EPROM Programming Register (EPROG)

The EPROM programming register shown in Figure 13-1 contains the

control bits for programming the EPROM. In normal operation, the

EPROM programming register contains all logic zeros.

EPGM — EPROM Programming

This read/write bit applies the voltage from the IRQ/VPP pin to the

EPROM. To write the EPGM bit, the ELAT bit must already be set.

Clearing the ELAT bit also clears the EPGM bit. Reset clears EPGM.

1 = EPROM programming power switched on

0 = EPROM programming power switched off

MPGM — Mask Option Register (MOR) Programming

This read/write bit applies programming power from the IRQ/VPP pin

to the MOR. Reset clears MPGM.

1 = MOR programming power switched on

0 = MOR programming power switched off

ELAT — EPROM Bus Latch

This read/write bit configures address and data buses for

programming the EPROM array. EPROM data cannot be read when

ELAT is set. Clearing the ELAT bit also clears the EPGM bit. Reset

clears ELAT.

1 = Address and data buses configured for EPROM programming

of the array. The address and data buses are latched in the

EPROM array when a subsequent write to the array is made.

Data in the EPROM array cannot be read.

0 = Address and data buses configured for normal operation

$001C

Bit 7

654321

Bit 0

Read:

00000

ELAT

MPGM

EPGM

Write:

RRRR

Reset:

00000000

= Unimplemented

= Reserved for test

Figure 13-1. EPROM Programming Register (EPROG)

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC705JJ7GRS/D Datasheet(PDF) 180 Page - NXP Semiconductors

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