HC705RC17GRSSLASHD datasheet(15/126 Pages) NXP

15 / 126 page

MC68HC705RC17 — Rev. 2.0

General Release Specification

General Description

General Release Specification — MC68HC705RC17

Section 1. General Description

1.1 Contents

1.2

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15

1.3

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16

1.4

Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18

1.5

Signal Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18

1.5.1

VDD and VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19

1.5.2

IRQ/VPP (Maskable Interrupt Request) . . . . . . . . . . . . . . . .20

1.5.3

OSC1 and OSC2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20

1.5.4

RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21

1.5.5

LPRST. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21

1.5.6

IRO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22

1.5.7

Port A (PA0–PA7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22

1.5.8

Port B (PB0–PB7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22

1.5.9

Port C (PC0–PC1 and PC4–PC7). . . . . . . . . . . . . . . . . . . .22

1.5.10

XFC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23

1.5.11

VDDSYN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23

1.2 Introduction

The MC68HC705RC17 is a general-purpose, low-cost addition to the

M68HC05 Family of microcontroller units (MCUs) and is suitable for

remote control applications. It contains the HC05 central processing unit

(CPU) core, including the 14-stage core timer with real-time interrupt

(RTI), computer operating properly (COP) watchdog systems, and a

programmable phase-lock loop (PLL) synthesizer. On-chip peripherals

include a carrier modulator transmitter. The 16-Kbyte memory map has

15,936 bytes of user EPROM, 340 bytes of boot ROM, and 352 bytes of

RAM. There are 18 input-output (I/O) lines (eight having keyscan logic

and pullups) and a low-power reset pin.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC705RC17GRS/D Datasheet(PDF) 15 Page - NXP Semiconductors

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