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HC805P18GRS/D Datasheet(PDF) 13 Page - NXP Semiconductors |
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HC805P18GRS/D Datasheet(HTML) 13 Page - NXP Semiconductors |
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13 / 111 page ![]() GENERAL RELEASE SPECIFICATION INTRODUCTION MC68HC805P18 1-4 8 2 3 4 5 6 7 8 9 10 11 12 13 14 A 16 17 18 19 20 1.4 Functional Pin Description The following paragraphs describe the functionality of each pin on the MC68HC805P18 package. Pins connected to subsystems described in other sections provide a reference to the section instead of a detailed functional description.The pinout is shown in Figure 1-2. Figure 1-2. User Mode Pinout 1.4.1 V DD and VSS Power is supplied to the MCU through V DD and VSS. VDD is connected to a regulated positive supply and V SS is connected to ground. Very fast signal transitions occur on the MCU pins. The short rise and fall times place very high short-duration current demands on the power supply. To prevent noise problems, take special care to provide good power supply bypassing at the MCU. Use bypass capacitors with good high-frequency characteristics, and position them as close to the MCU as possible. Bypassing requirements vary, depending on how heavily the MCU pins are loaded. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 RESET IRQ PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0 SDO/PB5 SDI/PB6 SCK/PB7 VSS VDD OSC1 OSC2 PD7/TCAP TCMP PD5/CKOUT PC0 PC1 PC2 PC3/AD3 PC4/AD2 PC5/AD1 PC6/AD0 PC7/VREFH Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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