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STM32U5A5QJI Datasheet(PDF) 80 Page - STMicroelectronics

Part # STM32U5A5QJI
Description  Ultra-low-power Arm® Cortex®-M33 32-bit MCUTrustZone®FPU,240 DMIPS, 4 MB Flash, 2.5 MB SRAM, LTDC, MIPI® DSI, crypto
PDF  382 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32U5A5QJI Datasheet(HTML) 80 Page - STMicroelectronics

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Functional overview
STM32U5Axxx
80/382
DS13543 Rev 1
•
51 or 75 clock cycle latency in ECB encryption mode for AES processing one 128-bit
block of data with, respectively, 128-bit or 256-bit key
•
Integrated round key scheduler to compute the last round key for AES ECB/CBC
decryption
•
256-bit register for storing the cryptographic key (four 32-bit registers), with key
atomicity enforcement
•
128-bit registers for storing initialization vectors (four 32-bit registers)
•
One 32-bit input buffer and one 32-bit output buffer
•
Automatic data flow control with support of single-transfer direct memory access (DMA)
using two channels (one for incoming data, one for processed data)
•
Data swapping logic to support 1-, 8-, 16- or 32-bit data
•
Possibility for software to suspend a message if the SAES/AES needs to process
another message with a higher priority (suspend/resume operation)
•
SAES additional features:
–
Security context enforcement for keys
–
Hardware secret key encryption/ decryption (wrapped key mode) and sharing with
faster AES peripheral (Shared key mode)
–
Protection against differential power analysis (DPA) and related side-channel
attacks
–
Optional hardware loading of two hardware secret keys (BHK, DHUK) that can be
XORed together
On top of standard AES encryption and decryption with a key loaded by software, SAES
peripheral allows the following advanced use cases:
•
Allow or deny the sharing of a key between a secure and a nonsecure application,
enforced by hardware
•
Encrypt once a key using side-channel resistant AES, then share it to a faster AES
engine by decrypting it (Shared key mode)
•
On-chip encrypted storage using chip-unique secret DHUK
•
Transport key generation by encrypting the device public unique ID with the application
secret BHK
•
Binding of device secure storage keys, using the silicon unique secret key (DHUK)
XORed with the boot secret key (BHK). If BHK is lost, the whole device secure storage
is lost.
Note:
Encrypted storage or derived keys that are using DHUK or BHK, cannot be used anymore
when a security breach is detected.
Table 19. AES/SAES features
AES/SAES modes/features(1)
AES
SAES
ECB, CBC chaining
X
X
CTR, CCM, GCM chaining
X
-
AES 128-bit ECB encryption in cycles
51
528
DHUK and BHK key selection
-
X



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