STM32U545NET3QTR datasheet(78/283 Pages) STMICROELECTRONICS

78 / 283 page

Functional overview

STM32U545xx

78/283

DS14216 Rev 1

•

Up to 8 tamper pins for 8 external tamper detection events:

–

Active tamper mode: continuous comparison between tamper output and input to

protect from physical open-short attacks

–

Flexible active tamper I/O management: from 4 meshes (each input associated to

its own exclusive output) to 7 meshes (single output shared for up to 7 tamper

inputs)

–

Passive tampers: ultra-low power edge or level detection with internal pull-up

hardware management

–

Configurable digital filter

•

11 internal tamper events to protect against transient or environmental perturbation

attacks:

–

Backup domain voltage monitoring

–

Temperature monitoring

–

LSE monitoring

–

RTC calendar overflow

–

JTAG/SWD access if RDP different from 0

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Monotonic counter overflow

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Cryptographic peripherals fault (RNG, SAES, AES, PKA)

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Independent watchdog reset when tamper flag is already set

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3 ADC4 watchdogs

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Each tamper can be configured in two modes:

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Hardware mode: immediate erase of secrets on tamper detection, including

backup registers erase

–

Software mode: erase of secrets following a tamper detection launched by

software

•

Any tamper detection can generate a RTC time stamp event.

•

TrustZone support:

–

Tamper secure or nonsecure configuration

–

Backup registers configuration in 3 configurable-size areas:

- 1 read/write secure area

- 1 write secure/read nonsecure area

- 1 read/write nonsecure area

–

Boot secret key (BHK) only usable by secure AES peripheral, stored in backup

registers, protected against read and write access

•

Tamper configuration and backup registers privilege protection

•

Monotonic counter

STM32U545NET3QTR Datasheet(PDF) 78 Page - STMicroelectronics

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