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STM32U545NET3QTR Datasheet(PDF) 190 Page - STMicroelectronics |
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STM32U545NET3QTR Datasheet(HTML) 190 Page - STMicroelectronics |
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190 / 283 page ![]() Electrical characteristics STM32U545xx 190/283 DS14216 Rev 1 Figure 28. AC timing diagram for high-speed external clock source (analog mode) Low-speed external user clock generated from an external source In bypass mode, the LSE oscillator is switched off and the input pin is a standard GPIO. The external clock signal has to respect the I/O characteristics in Section 5.3.14: I/O port characteristics. However, the recommended clock input waveform is shown in Figure 29 and Figure 30. Figure 29. AC timing diagram for low-speed external square clock source MSv71538V1 VHSE_ext VHSE_ext_PP t tHSE_ext = 1/fHSE_ext 90% 10% tf(HSE) tr(HSE) Table 78. Low-speed external user clock characteristics(1) Symbol Parameter Min Typ Max Unit fLSE_ext User external clock source frequency 5 32.768 40 kHz VLSE_ext_PP OSC32_IN peak-to-peak amplitude 0.3 - VSW(2) V VLSE_ext OSC32_IN input range 0 - VSW(2) tw(LSEH) tw(LSEL) OSC32_IN high or low time for square signal input 10 - - μs 1. Specified by design. Not tested in production. 2. VSW = VDD when VDD is above VBOR0, and VSW=VBAT when VDD is below VBOR0. MSv67851V3 VLSEH 70% 30% t VLSEL tw(LSEH) tw(LSEL) VLSE_ext tLSE = 1/fLSE_ext VLSE_ext_PP |
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