STM32U545NET3QTR datasheet(272/283 Pages) STMICROELECTRONICS

Part #	STM32U545NET3QTR

Description	Ultra-low-power Arm® Cortex®-M33 MCUTrustZone®FPU,240 DMIPS, 512 KB flash memory, 274 KB SRAM, crypto

PDF	283 Pages

Scroll/Zoom	100%

Manufacturer	STMICROELECTRONICS [STMicroelectronics]

Direct Link	http://www.st.com

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272 / 283 page

Package information

STM32U545xx

272/283

DS14216 Rev 1

6.6

WLCS72 package information

This WLCSP is a 72-ball, 3.38 x 3.38 mm, 0.35 mm pitch, wafer level chip scale package.

Figure 70. WLCSP72 - Outline

1. Drawing is not to scale.

2. Dimension is measured at the maximum bump diameter parallel to primary datum Z.

3. Primary datum Z and seating plane are defined by the spherical crowns of the bump.

4. Bump position designation per JESD 95-1, SPP-010. The tolerance of position that controls the location of the pattern of

balls with respect to datums X and Y. For each ball there is a cylindrical tolerance zone ccc perpendicular to datum Z and

located on true position with respect to datums X and Y as defined by e. The axis perpendicular to datum Z of each ball

must lie within this tolerance zone.

A2 BALL LOCATION

BOTTOM VIEW

bbb Z

DETAIL A

SIDE VIEW

A2 ORIENTATION

REFERENCE

aaa

(4X)

FRONT VIEW

TOP VIEW

DETAIL A

ROTATED 90

(not in scale)

SEATING PLANE

ccc

ddd

Z XY

eee Z

BUMP

B0HK_WLCSP72_ME_V1

b (72x)

STM32U545NET3QTR Datasheet(PDF) 272 Page - STMicroelectronics