9FGL699

6-OUTPUT LOW POWER DIFFERENTIAL SYNTHESIZER FOR PCIE GEN2

IDT® 6-OUTPUT LOW POWER DIFFERENTIAL SYNTHESIZER FOR PCIE GEN2

5

9FGL699

REV B 013113

SMBus Table: Device Control Register, READ/WRITE ADDRESS (D3/D2)

Pin #

Name

Control Function

Type

0

1

Default

Bit 7

0

Bit 6

0

Bit 5

RW

Off

-0.50%

1

Bit 4

0

Bit 3

0

Bit 2

0

Bit 1

0

Bit 0

0

SMBus Table: Output Enable Register

Pin #

Name

Control Function

Type

0

1

Default

Bit 7

0

Bit 6

DIF_0 EN

Output Enable

RW

Disable

Enable

1

Bit 5

0

Bit 4

0

Bit 3

DIF_1 EN

Output Enable

RW

Disable

Enable

1

Bit 2

0

Bit 1

0

Bit 0

0

SMBus Table: Reserved Register

Pin #

Name

Control Function

Type

0

1

Default

Bit 7

0

Bit 6

0

Bit 5

0

Bit 4

0

Bit 3

0

Bit 2

0

Bit 1

0

Bit 0

0

SMBus Table: Output Enable Register

Pin #

Name

Control Function

Type

0

1

Default

Bit 7

DIF_5 EN

Output Enable

RW

Disable

Enable

1

Bit 6

DIF_4 EN

Output Enable

RW

Disable

Enable

1

Bit 5

0

Bit 4

0

Bit 3

0

Bit 2

0

Bit 1

0

Bit 0

0

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Spread Enable

Reserved

Reserved

Reserved

Reserved

P

Reserved

-

-

Reserved

Reserved

-

-

-

-

-

-

-

-

-

-

-

Byte 3

-

-

-

-

-

-

-

-

Byte 1

Byte 0

-

-

-

-

-

-

-

-

-

-

Byte 2