DA16200 datasheet(130/154 Pages) RENESAS

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DA16200

Ultra Low Power Wi-Fi SoC

Datasheet

Revision 3.6

04-Jan-2023

CFR0011-120-00

130 of 153

Bit

Mode

Symbol

Description

Reset

20:18

R/W

IP2_MON_CTRL

For testing purpose

3'b0

17:16

R/W

RTC_XTAL32K_GM

XTAL 32 Khz gain control

2'b11

15:14

R/W

RTC_OSC32K_ICTRL

Osc32K sleep current control, 00: min ~ 11: max

2'h0

13:12

R/W

RTC_XTAL32K_ICTRL

Xtal32K sleep current control, 00: min ~ 11: max

2'b01

11:10

R/W

RTC_uLDO_LICTRL

uLDO sleep current control, 00: min~ 11: max

2'b01

9:8

R/W

RTC_uLDO_HICTRL

uLDO speed up control

00: low speed

11: high speed

2'b11

7:4

R/W

RTC_uLDO_VCTRL: uLDO output voltage control

4'b0001 (1.12V) ~ 4'b1111 (0.8V)

4'b0001

R/W

PDB_TEST_BUF: IP2 test buffer enable

1'b0

R/W

RTC clock inversion: for test purpose

0: bypass

1: inversion

1'b0

Table 209: bor_circuit (0x5009104C)

Bit

Mode

Symbol

Description

Reset

R/W

EN_LP_BOR (Note 1)

Enable BOR when in low power sleep mode.

SW can enable this before entering sleep mode.

0: disabled

1: enabled

1'b0

20:18

R/W

genpor_max (Note 1)

Time to wait after recovering from a BOD event

before triggering a POR.

0: < 250 ms

1: 250 ~ 500 ms

2: 500 ~ 750 ms (default value)

3: 750 ~ 1000 ms

4: 1000 ~ 1250 ms

5: 1250 ~ 1500 ms

6: 1500 ~ 1750 ms

7: 1750 ~ 2000 ms

3'b010

R/W

bod_flag_reg (Note 1)

When set to 0, indicates that SW is executing

critical code (i.e. writing to flash) and a BOD event

should not immediately trigger a reset. The BOD

event processing is suspended until this flag is set

to 1.

0: not safe for BOD event processing

1'b1

DA16200 Datasheet(PDF) 130 Page - Renesas Technology Corp

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