DATASHEET

2 TO 4 DIFFERENTIAL PCIE GEN1 CLOCK MUX

ICS557-06

IDT® 2 TO 4 DIFFERENTIAL PCIE GEN1 CLOCK MUX

1

ICS557-06

REV M 070512

Description

The ICS557-06 is a two to four differential clock mux

designed for use in PCI-Express applications. The device

selects one of the two differential HCSL input pairs and fans

out to four pairs of differential HCSL or LVDS outputs.

Features

• Packaged in 20-pin TSSOP

• Pb (lead) free packaging

• Operating voltage of 3.3 V

• Low power consumption

• Input differential clock of up to 200 MHz

• Jitter 60 ps (cycle-to-cycle)

• Output-to-output skew of 50 ps

• Available in industrial temperature range (-40 to +85°C)

• For PCIe Gen2/3 applications, see the 5V41067A

Block Diagram

VDD

CLKA

CLKA

Rr (IREF)

CLKB

CLKB

CLKC

CLKC

CLKD

CLKD

SEL

GND

IN1

IN1

IN2

IN2

MUX

2 to 1

OE

2

2

PD