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ICS1894-44 Datasheet(PDF) 13 Page - Renesas Technology Corp |
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ICS1894-44 Datasheet(HTML) 13 Page - Renesas Technology Corp |
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13 / 54 page ![]() ICS1894-44 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH MII INTERFACE PHYCEIVER IDT® 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH MII INTERFACE 13 ICS1894-44 REV B 030112 If a crystal is used as the clocking source, connect it to both the REF_IN (pin 37) and REF_OUT (pin 36) pins of the ICS1894-44. A pair of bypass capacitors on either side of the crystal are connected to ground. The crystal is used in the parallel resonance or anti-resonance mode. The value of the load caps serve to adjust the final frequency of the crystal oscillation. Typical applications would use 25 pF load caps. The exact value will be affected by the board routing capacitance on REF_IN and REF_OUT pins. Smaller load capacitors raise the frequency of oscillation. Once the exact value of load capacitance is established it will be the same for all boards using the same specification crystal. The best way to measure the crystal frequency is to measure the frequency of TXCLK (pin 28) using a frequency counter with a 1 second gate time. Using the buffered output TXCLK prevents the crystal frequency from being affected by the measurement. The crystal specification is shown in the 25MHz Crystal Specification table. 25 MHz Crystal Specification Table 25 MHz Oscillator Specification table Status Interface The ICS1894-44 has five multi-function configuration pins that report the PHY status by providing signals that are intended for driving LEDs. Configuration is set by Bank0 Register 20. Specifications Symbol Minimum Typical Maximum Unit Fundamental Frequency F0 24.99875 25.00000 25.00125 MHz Freq. Tolerance ΔF/f ± 50 ppm Input Capacitance Cin 3 pF Specifications Symbol Minimum Typical Maximum Unit Output Frequency F0 24.99875 25.00000 25.00125 MHz Freq. Stability (including aging) ΔF/f ± 50 ppm Duty cycle CMOS level one-half VDD Tw/T 35 65 % VIH 2.79 Volts VIL 0.33 Volts |
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