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ICS8714008I Datasheet(PDF) 1 Page - Renesas Technology Corp |
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ICS8714008I Datasheet(HTML) 1 Page - Renesas Technology Corp |
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1 / 35 page  DATASHEET FemtoClock® Zero Delay Buffer/ Clock Generator for PCI Express™ and Ethernet ICS8714008I ICS8714008DKI REVISION A NOVEMBER 25, 2013 1 ©2013 Integrated Device Technology, Inc. General Description The ICS8714008I is Zero-Delay Buffer/Frequency Multiplier with eight differential HCSL output pairs, and uses external feedback (differential feedback input and output pairs) for “zero delay” clock regeneration. In PCI Express and Ethernet applications, 100MHz and 125MHz are the most commonly used reference clock frequencies and each of the eight output pairs can be independently set for either 100MHz or 125MHz. With an output frequency range of 98MHz to 165MHz, the device is also suitable for use in a variety of other applications such as Fibre Channel (106.25MHz) and XAUI (156.25MHz). The M-LVDS Input/Output pair is useful in backplane applications when the reference clock can either be local (on the same board as the ICS8714008I) or remote via a backplane connector. In output mode, an input from a local reference clock applied to the CLK, nCLK input pins is translated to M-LVDS and driven out to the MLVDS, nMLVDS pins. In input mode, the internal M-LVDS driver is placed in High-impedance state using the OE_MLVDS pin and MLVDS, nMLVDS pin then becomes an input (e.g. from a backplane). The ICS8714008I uses very low phase noise FemtoClock technology, thus making it ideal for such applications as PCI Express Generation 1, 2 and 3 as well as for Gigabit Ethernet, Fibre Channel, and 10 Gigabit Ethernet. It is packaged in a 56-VFQFN package (8mm x 8mm). Features • Eight 0.7V differential HCSL output pairs, individually selectable for 100MHz or 125MHz for PCIe and Ethernet applications • One differential clock input pair CLK, nCLK can accept the following differential input levels: LVPECL, LVDS, M-LVDS, LVHSTL, HCSL • One M-LVDS I/O pair (MLVDS, nMLVDS) • Output frequency range: 98MHz - 165MHz • Input frequency range: 19.6MHz - 165MHz • VCO range: 490MHz - 660MHz • PCI Express (2.5 Gb/s), Gen 2 (5 Gb/s), and Gen 3 (8 Gb/s) jitter compliant • External feedback for “zero delay” clock regeneration • RMS phase jitter @ 125MHz (1.875MHz – 20MHz): 0.59ps (typical) • Full 3.3V supply mode • -40°C to 85°C ambient operating temperature • Lead-free (RoHs 6) packaging Pin Assignment ICS8714008I 56-Lead VFQFN 8mm x 8mm x 0.925mm package body 4.5mm x 5.2mm ePad size K Package Top View 15 17 18 21 24 25 27 28 1 2 3 4 5 6 7 8 9 10 11 12 13 14 36 37 38 39 40 41 42 35 34 33 32 31 30 29 VDD OE_MLVDS MLVDS nMLVDS GND PLL_SEL VDD GND nc FBO_DIV MR OE0 OE1 OE2 VDD Q2 nQ2 Q3 nQ3 VDD IREF Q4 nQ4 Q5 nQ5 FBOUT nFBOUT VDD 48 49 50 51 52 53 54 55 56 47 46 45 44 43 |
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