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LTM4709

Rev. 0

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A 2.2μF bypass capacitor has already been integrated

between the BIAS pin and GND inside the LTM4709,

so no bypass capacitor is needed on the BIAS pin. To

ensure proper operation, the BIAS voltage must satisfy

the following conditions: 2.375V ≤ VBIAS ≤ 5.5V and VBIAS

≥ (VOUT + 1.2V). For VOUT ≤ 1.15V, the minimum BIAS

voltage is limited to 2.375V.

Load Regulation

The LTM4709 corrects for parasitic package and PCB I-R

drops when the VOUTS1,2,3 pin is Kelvin connected to the

remote load. The LTM4709 handles moderate levels of

output line impedance, but excessive impedance between

VOUT and COUT causes a phase shift in the feedback loop

and adversely affects stability.

PCB Layout Considerations

Given the LTM4709’s high bandwidth and high PSRR,

care must be taken to the PCB layout of the application

circuit to fully employ the high-performance of LTM4709.

Figure 14 shows a recommended layout that delivers the

best performance of the μModule. Refer to the DC3211A

evaluation board demo manual for further details.

Protection Features

The LTM4709 has an internal current limit that typically

clamps output current to 3.3A when the IMONR pin

is connected to GND. In addition, the LTM4709 has a

±2.4% accurate programmable precision current limit. If

the ambient temperature is high enough, the die junction

temperature can exceed the maximum operation tempera-

ture of LTM4709. If this occurs, the LTM4709 relies on

an internal thermal safety feature. At 168°C typically, the

LTM4709 thermal shutdown is triggered, and the output

is shut down until the IC temperature falls below its ther-

mal hysteresis which is 7

°C.

Current Monitor and Externally Programmable

Current Limit

The current limit threshold voltage on the IMON1,2,3 pin

is 1V. Connecting a resistor from IMON to GND sets the

maximum current flowing out of the IMON pin, which in

turn programs the LTM4709’s current limit. If the IMONR

pin is connected to GND with the IMON pin floating, it

directly programs the current limit to 3.3A. The current

limit equals to 3000/resistance. For example, with a 1.5k

resistor to GND, the current limit is set at 2A. The voltage

at the IMON pin, VIMON, can be used to monitor output

current IOUT as well. By connecting the resistor R between

IMON and GND, output current IOUT can be calculated

with Equation 3.

IOUT =

VIMON • 3000

(3)

Paralleling Devices for Higher Output Current

Multiple outputs of a single LTM4709 or multiple

LTM4709 can be paralleled to obtain a higher output

current. To achieve the paralleling, tie the VIN pins and

the VREF pins of the multiple devices together. The output

of the LTM4709 needs to be connected to a common

load using a small ballast resistor (2mΩ), beyond the

feedback VOUTS pin of each channel. The ballast resistor

ensures output current sharing. See the circuit schematic

(Figure 17) for parallel operation.

Output Noise

The LTM4709 offers many advantages with respect to

noise performance. Traditional linear regulators have sev-

eral sources of noise. The most critical ones are from

the voltage reference, error amplifier, and the resistor

divider network used to set the output voltage. Inside the

LTM4709, a 2.2μF bypass capacitor is connected between

VREF and GND to filter out voltage reference noise, result-

ing in a low output noise set just by the error amplifier’s

noise – typically 1.3μVRMS in a frequency range from

10Hz to 100kHz.

Filtering High-Frequency Spikes

For applications where the LTM4709 is used to post

regulate a switching converter, its high PSRR effectively

suppresses any noise present at the switcher’s switch-

ing frequency – typically 100kHz to 1MHz. However, the

very high frequency (hundreds of MHz) spikes – beyond

the LTM4709’s bandwidth associated with the switcher’s

power switch transition times will almost directly pass

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