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GWIXP425BCT Datasheet(PDF) 101 Page - Intel Corporation |
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GWIXP425BCT Datasheet(HTML) 101 Page - Intel Corporation |
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101 / 134 page  Intel® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor Datasheet March 2005 Document Number: 252479, Revision: 005 101 5.5.2.7 Expansion Bus Figure 26. Signal Timing With Respect to Clock Rising Edge Table 53. Signal Timing With Respect to Clock Rising Edge Symbol Description Min. Max. Units Notes Tov Control signal and data output valid after clock rising edge 15 ns Tsetup Input Setup time with respect to clock rising edge. 3 ns 1 Thold Input Hold time with respect to clock rising edge. 2 ns 1 Note: 1. The Setup and Hold Timing Values are for all modes. B4870-002 EX_CLK EX_CS_N[0] EX_ADDR[23:0] EX_RD_N EX_DATA[15:0] Valid Address Tsetup Thold 1-4 Cycles 1-4 Cycles 1-16 Cycles 1-4 Cycles 1-16 Cycles T1 T2 T3 T4 T5 EX_IOWAIT_N EX_WR_N EX_DATA[15:0] Data Out Data In TOV TOV TOV |
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