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BIPOLAR ANALOG INTEGRATED CIRCUIT

μPC835

LOW-POWER, HIGH-STABILITY, LOW-OFFSET VOLTAGE

J-FET INPUT DUAL OPERATIONAL AMPLIFIER

DATA SHEET

Document No. G18672EJ1V0DS00 (1st edition)

Date Published March 2007 NS CP(N)

Printed in Japan

2007

DESCRIPTION

The

μ PC835 is the higher version of μ PC832 and 4062, the J-FET input operational amplifiers, in stability and

accuracy. The

μ PC835 is a J-FET input dual operational amplifier which realizes both low power consumption and

high stability, by adopting a high speed PNP transistor of fT = 300 MHz on its output stage.

In addition, despite its J-FET input, the

μ PC835 realizes low offset voltage characteristics that eclipses conventional

general operational amplifiers, by using a resistance trimming system, the proven method for our high accuracy

operational amplifier and high accuracy reference voltage.

The

μ PC835 is ideal for use in measurement instruments and control instruments, which especially requires the

stability during capacitive load connections.

FEATURES

• Input offset voltage

±3 mV MAX.

• Slew rate

5.5 V/

μ s TYP.

• Unity gain frequency 2.8 MHz TYP.

• Low power

ICC

≤ 2.2 mA MAX.

(Reduces circuit currents while maintaining relatively high slew rate and bandwidth)

• High stability is secured to capacitive loads

(4000 pF, AV =

+1)

• Internal frequency compensation

• Small package

The whole size of the package is downsized by 30 to 40% compared with a standard SOP contour,

by using a TSSOP (3 x 3 mm

2 body) package

ORDERING INFORMATION

Part Number

Package

Packing Type

μ PC835MN-KAA-E1-AT

Note

8-pin plastic TSSOP (3 x 3)

• 12 mm wide embossed taping

• Pin 1 at draw-out side

• 4000 p/reel

μ PC835MN-KAA-E2-AT

Note

8-pin plastic TSSOP (3 x 3)

• 12 mm wide embossed taping

• Pin 1 at reel side

• 4000 p/reel

Note Pb-free (This product does not contain Pb in the external electrode and other parts.)